[PATCH 2/2] RTEMS changes for lpc32xx VFP support

Sebastian Huber sebastian.huber at embedded-brains.de
Fri Aug 19 05:42:22 UTC 2016



On 19/08/16 02:16, Kirspel, Kevin wrote:
>
> diff --git a/c/src/lib/libbsp/arm/lpc32xx/make/custom/lpc32xx.inc 
> b/c/src/lib/libbsp/arm/lpc32xx/make/custom/lpc32xx.inc
>
> old mode 100644
>
> new mode 100755
>
> index f184741..1d478ce
>
> --- a/c/src/lib/libbsp/arm/lpc32xx/make/custom/lpc32xx.inc
>
> +++ b/c/src/lib/libbsp/arm/lpc32xx/make/custom/lpc32xx.inc
>
> @@ -6,7 +6,8 @@ include $(RTEMS_ROOT)/make/custom/default.cfg
>
>  RTEMS_CPU = arm
>
> -CPU_CFLAGS = -mcpu=arm926ej-s -mthumb
>
> +#CPU_CFLAGS = -mcpu=arm926ej-s -mthumb
>
> +CPU_CFLAGS = -mcpu=arm926ej-s -mfpu=vfp -mfloat-abi=softfp
>
>  CFLAGS_OPTIMIZE_V ?= -O2 -g
>
> CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
>
> diff --git a/c/src/lib/libbsp/arm/shared/start/start.S 
> b/c/src/lib/libbsp/arm/shared/start/start.S
>
> old mode 100644
>
> new mode 100755
>
> index 30501be..cb3bff7
>
> --- a/c/src/lib/libbsp/arm/shared/start/start.S
>
> +++ b/c/src/lib/libbsp/arm/shared/start/start.S
>
> @@ -19,9 +19,9 @@
>
>   */
>
>  #include <rtems/asm.h>
>
> -#include <rtems/system.h>
>
> +#include <rtems/system.h>
>
> #include <rtems/score/cpu.h>
>
> -
>
> +
>
> #include <bspopts.h>
>
> #include <bsp/irq.h>
>
> #include <bsp/linker-symbols.h>
>
> @@ -265,6 +265,7 @@ bsp_start_skip_hyp_svc_switch:
>
>                /* Stay in SVC mode */
>
>  #ifdef ARM_MULTILIB_VFP
>
> +#ifndef ARM_MULTILIB_ARCH_V5TEJ
>

I think a multilib define reflecting the VFP feature set would be better 
instead of this ARM_MULTILIB_ARCH_V5TEJ.

>                /* Read CPACR */
>
>                mrc p15, 0, r0, c1, c0, 2
>
> @@ -280,11 +281,18 @@ bsp_start_skip_hyp_svc_switch:
>
>                /* Write CPACR */
>
>                mcr p15, 0, r0, c1, c0, 2
>
>                isb
>
> +#endif
>
>                 /* Enable FPU */
>
>                mov r0, #(1 << 30)
>
>                vmsr FPEXC, r0
>
> +#ifdef ARM_MULTILIB_ARCH_V5TEJ
>
> +             /* Enable FPU Run Fast*/
>
> +             mov r0, #(3 << 24)
>
> +             vmsr FPSCR, r0
>
> +#endif
>
> +
>
> #ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
>
>                bl bsp_start_init_registers_vfp
>
> #endif
>
> @@ -399,6 +407,7 @@ _start:
>
> #endif
>
>  #ifdef ARM_MULTILIB_VFP
>
> +#ifndef ARM_MULTILIB_ARCH_V5TEJ
>
>                /*
>
>                 * Enable CP10 and CP11 coprocessors for privileged and 
> user mode in
>
>                 * CPACR (bits 20-23). Ensure that write to register 
> completes.
>
> @@ -409,6 +418,7 @@ _start:
>
>                str           r1, [r0]
>
>                dsb
>
>                isb
>
> +#endif
>
>  #ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
>
>                bl bsp_start_init_registers_vfp
>
> diff --git a/cpukit/score/cpu/arm/arm-context-validate.S 
> b/cpukit/score/cpu/arm/arm-context-validate.S
>
> old mode 100644
>
> new mode 100755
>
> index fdfb6c1..6485993
>
> --- a/cpukit/score/cpu/arm/arm-context-validate.S
>
> +++ b/cpukit/score/cpu/arm/arm-context-validate.S
>
> @@ -46,7 +46,11 @@
>
>                 .section .text
>
> +#ifdef __thumb__
>
> FUNCTION_THUMB_ENTRY(_CPU_Context_validate)
>
> +#else
>
> +FUNCTION_ENTRY(_CPU_Context_validate)
>
> +#endif
>

I checked in a slightly modified version for the VFP context validation.

-- 
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax     : +49 89 189 47 41-09
E-Mail  : sebastian.huber at embedded-brains.de
PGP     : Public key available on request.

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