Mailbox RPi patch and rtems_cache_* probably broken on RPi

Fri Jun 24 17:17:03 UTC 2016

Hello Sebastian,

On Friday 24 of June 2016 12:49:38 Sebastian Huber wrote:
> We have two tests for the cache manager spcache01 and smpcache01. It is
> not easy to write a proper test for the cache manager, so these tests
> are far from being perfect, however they check the common cases. Every
> BSP with at least 4MiB of RAM should be able to pass all tests.

Problem of cache management tests run by CPU only is that they
can catch when cache operations are really broken (i.e. instead
of flush/arm-clean data are invalidated etc.). Even when run
on multiple CPUs then most of today systems are on cache
level coherent (MESI, MOESI) so you can only catch missing
barriers on CPU level. So if the implementation is missing
or cache operation is not processed for some part of data,
you do not find that.

I have run build of representants of all ARM BSPs
(with --disable-multiprocessing for now).
Except for altera-cyclone-v, atsamv, lpc32xx_mzx, realview-pbx-a9, xilinx-zynq 
are all these operation compiled as dummy on boards I have
tested. It is correct for Cortex-M{0134} and some MCU ARM7TDMI
based chips. But for all which have MMU and MMU is enabled
in RTEMS it is flaw. One options is to add information that
cache is used in each BSP other is to decode right way GCC
flags to seelet if core including MMU is used or not.
BSPs. The source c/src/lib/libcpu/shared/src/cache_manager.c
is not build as part of CPUkit so it should be doable on
base from GCC flags because these files are build with
more fine grained flags. If that is part of CPU kit multilib
build then it would be real problem because the same multilib
variant is used for example for old ARM7TDMI and Raspberry Pi
arm1176jzf-s.

There is complete list of BSPs I have checked. If the first
instruction of rtems_cache_flush_multiple_data_lines is
bx lr then cache is MMU is not considered fro given target.

I have captured
  arm-rtems4.12-gcc -dM -E
for all BSPs build options so I can try to check which
defines can be used to distinguish the targets
architectures/cores.

Best wishes,

              Pavel

Checking cache manager operations for altera-cyclone-v altcycv_devkit
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	b3c1      	cbz	r1, 74 <rtems_cache_flush_multiple_data_lines+0x74>

Checking cache manager operations for altera-cyclone-v altcycv_devkit_smp
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	b3c1      	cbz	r1, 74 <rtems_cache_flush_multiple_data_lines+0x74>

Checking cache manager operations for atsam atsamv
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	f3bf 8f4f 	dsb	sy

Checking cache manager operations for beagle beagleboneblack
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for csb336 csb336
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for csb337 csb337
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for csb337 csb637
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for csb337 kit637_v6
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for edb7312 edb7312
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for gdbarmsim arm1136jfs
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for gdbarmsim arm1136js
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for gdbarmsim arm7tdmi
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for gdbarmsim arm920
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for gdbarmsim armcortexa9
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for gumstix gumstix
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for lm3s69xx lm3s6965
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	4770      	bx	lr

Checking cache manager operations for lm3s69xx lm4f120
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	4770      	bx	lr

Checking cache manager operations for lpc24xx lpc17xx_ea_ram
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	4770      	bx	lr

Checking cache manager operations for lpc24xx lpc24xx_ea
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	4770      	bx	lr

Checking cache manager operations for lpc24xx lpc40xx_ea_ram
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	4770      	bx	lr

Checking cache manager operations for lpc24xx lpc40xx_ea_rom_int
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	4770      	bx	lr

Checking cache manager operations for lpc32xx lpc32xx_mzx
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	b510      	push	{r4, lr}

Checking cache manager operations for raspberrypi raspberrypi2
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	4770      	bx	lr

Checking cache manager operations for raspberrypi raspberrypi
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for realview-pbx-a9 realview_pbx_a9_qemu
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	b480      	push	{r7}

Checking cache manager operations for realview-pbx-a9 realview_pbx_a9_qemu_smp
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	b480      	push	{r7}

Checking cache manager operations for rtl22xx rtl22xx
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for rtl22xx rtl22xx_t
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	4770      	bx	lr

Checking cache manager operations for smdk2410 smdk2410
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	e12fff1e 	bx	lr

Checking cache manager operations for stm32f4 stm32f105rc
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	4770      	bx	lr

Checking cache manager operations for stm32f4 stm32f4
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	4770      	bx	lr

Checking cache manager operations for tms570 tms570ls3137_hdk_sdram
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	4770      	bx	lr

Checking cache manager operations for xilinx-zynq xilinx_zynq_zedboard
00000000 <rtems_cache_flush_multiple_data_lines>:
   0:	b3c1      	cbz	r1, 74 <rtems_cache_flush_multiple_data_lines+0x74>