[PATCH 1/2] Adding ARM VFP V2 support

Kevin Kirspel kevin-kirspel at idexx.com
Mon Jan 23 13:51:26 UTC 2017


---
 c/src/lib/libbsp/arm/shared/start/start.S | 14 ++++++++++++--
 cpukit/score/cpu/arm/rtems/score/arm.h    |  6 ++++++
 2 files changed, 18 insertions(+), 2 deletions(-)
 mode change 100644 => 100755 c/src/lib/libbsp/arm/shared/start/start.S
 mode change 100644 => 100755 cpukit/score/cpu/arm/rtems/score/arm.h

diff --git a/c/src/lib/libbsp/arm/shared/start/start.S b/c/src/lib/libbsp/arm/shared/start/start.S
old mode 100644
new mode 100755
index 7adcb44..33d4e64
--- a/c/src/lib/libbsp/arm/shared/start/start.S
+++ b/c/src/lib/libbsp/arm/shared/start/start.S
@@ -19,9 +19,9 @@
  */
 
 #include <rtems/asm.h>
-#include <rtems/system.h>	
+#include <rtems/system.h>
 #include <rtems/score/percpu.h>
-	
+
 #include <bspopts.h>
 #include <bsp/irq.h>
 #include <bsp/linker-symbols.h>
@@ -274,6 +274,7 @@ bsp_start_skip_hyp_svc_switch:
 	/* Stay in SVC mode */
 
 #ifdef ARM_MULTILIB_VFP
+#ifdef ARM_MULTILIB_HAS_CPACR
 	/* Read CPACR */
 	mrc p15, 0, r0, c1, c0, 2
 
@@ -289,11 +290,18 @@ bsp_start_skip_hyp_svc_switch:
 	/* Write CPACR */
 	mcr p15, 0, r0, c1, c0, 2
 	isb
+#endif
 
 	/* Enable FPU */
 	mov r0, #(1 << 30)
 	vmsr FPEXC, r0
 
+#ifdef __FAST_MATH__
+	/* Enable Fast FPU options */
+	mov r0, #(3 << 24)
+	vmsr FPSCR, r0
+#endif
+
 #ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
 	bl bsp_start_init_registers_vfp
 #endif
@@ -408,6 +416,7 @@ _start:
 #endif
 
 #ifdef ARM_MULTILIB_VFP
+#ifdef ARM_MULTILIB_HAS_CPACR
 	/*
 	 * Enable CP10 and CP11 coprocessors for privileged and user mode in
 	 * CPACR (bits 20-23).  Ensure that write to register completes.
@@ -418,6 +427,7 @@ _start:
 	str	r1, [r0]
 	dsb
 	isb
+#endif
 
 #ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
 	bl bsp_start_init_registers_vfp
diff --git a/cpukit/score/cpu/arm/rtems/score/arm.h b/cpukit/score/cpu/arm/rtems/score/arm.h
old mode 100644
new mode 100755
index 666ee54..f08da1d
--- a/cpukit/score/cpu/arm/rtems/score/arm.h
+++ b/cpukit/score/cpu/arm/rtems/score/arm.h
@@ -58,6 +58,12 @@ extern "C" {
   #define ARM_MULTILIB_CACHE_LINE_MAX_64
 #endif
 
+#if defined(__ARM_ARCH_7A__) \
+  || defined(__ARM_ARCH_7M__) \
+  || defined(__ARM_ARCH_7EM__)
+  #define ARM_MULTILIB_HAS_CPACR
+#endif
+
 #if !defined(__SOFTFP__)
   #if defined(__ARM_NEON__)
     #define ARM_MULTILIB_VFP_D32
-- 
1.9.1



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