Zynq SMP CPU0 Not Waking CPU1

Misra, Avinash Avinash.Misra at jhuapl.edu
Mon Dec 17 21:36:54 UTC 2018


I'm attempting to get SMP running on my Zynq board and am having an issue. It would appear that during CPU Initialization CPU0 initializes and then loops through _ARM_Data_memory_barrier waiting to receive a message from CPU1 before starting. The issue is that it would appear that it never receives the message from CPU1. I am currently able to get around this by manually waking up CPU1 through the Xilinx SDK but am not sure why CPU1 is not automatically starting. Have I missed a step?

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Avi Misra

JHU Applied Physics Laboratory
11100 Johns Hopkins Road
Laurel, MD 20723
Baltimore: (443) 778-8362
Washington: (240) 228-8362
Cell: (714) 594-8239

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