Zynq SMP CPU0 Not Waking CPU1

[Misra, Avinash]

Hi,

I'm attempting to get SMP running on my Zynq board and am having an issue. It would appear that during CPU Initialization CPU0 initializes and then loops through _ARM_Data_memory_barrier waiting to receive a message from CPU1 before starting. The issue is that it would appear that it never receives the message from CPU1. I am currently able to get around this by manually waking up CPU1 through the Xilinx SDK but am not sure why CPU1 is not automatically starting. Have I missed a step?

[cid:image001.png at 01D49626.B780EB30]


Thanks,
Avi Misra

JHU Applied Physics Laboratory
11100 Johns Hopkins Road
200-E314
Laurel, MD 20723
Baltimore: (443) 778-8362
Washington: (240) 228-8362
Cell: (714) 594-8239
www.jhuapl.edu<http://www.jhuapl.edu>

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/devel/attachments/20181217/9ee13151/attachment-0001.html>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: image001.png
Type: image/png
Size: 56592 bytes
Desc: image001.png
URL: <http://lists.rtems.org/pipermail/devel/attachments/20181217/9ee13151/attachment-0001.png>