Break points with latest SIS

[Jiri Gaisler]

On 2/7/19 12:53 PM, Jiri Gaisler wrote:
> On 2/7/19 12:45 PM, Sebastian Huber wrote:
>> On 07/02/2019 12:43, Jiri Gaisler wrote:
>>> Works OK here:
>>>
>>> $ sparc-rtems5-sis -leon3 -nouartrx -r -tlim 200 s -m 4  ./sparc-rtems5/c/leon3/testsuites/smptests/smpswitchextension01.exe
>>>
>>>   SIS - SPARC/RISCV instruction simulator 2.11,  copyright Jiri Gaisler 1995
>>>   Bug-reports to jiri at gaisler.se
>>>
>>>   LEON3 emulation enabled, 4 cpus online, delta 50 clocks
>>>
>>>
>>>
>>> *** BEGIN OF TEST SMPSWITCHEXTENSION 1 ***
>>> *** TEST VERSION: 5.0.0.03fcbb15d24e2eec41bac9f5dee30bbf7dc888b8-modified
>>> *** TEST STATE: EXPECTED-PASS
>>> *** TEST BUILD: RTEMS_NETWORKING RTEMS_POSIX_API RTEMS_SMP
>> I used --enable-rtems-debug:
>>
>> *** TEST BUILD: RTEMS_DEBUG RTEMS_NETWORKING RTEMS_POSIX_API RTEMS_SMP
> OK, I can repeat it. I will debug it ...


The problem comes from a function call to a NULL pointer in cpu 1:

   243329  4000a2f0  80a74016  cmp  %i5, %l6
   243331  4000a2f4  32bffffb  bne,a   0x000000004000a2e0
   243332  4000a2f8  c2076008  ld  [ %i5 + 8 ], %g1
   243334  4000a2e0  9210001c  mov  %i4, %o1
   243335  4000a2e4  9fc04000  call  %g1          <==== %g1 is 0
   243337  4000a2e8  90100013  mov  %l3, %o0
   243338  00000000  00000000  unimp  0
   243341  40000020  a1480000  rd  %psr, %l0

The source code is in cpukit/include/rtems/score/userextimpl.h:280

    while ( node != tail ) {
      const User_extensions_Switch_control *extension =
        (const User_extensions_Switch_control *) node;
   
      (*extension->thread_switch)( executing, heir );    <=====
   
      node = _Chain_Immutable_next( node );
    }
   
    _Per_CPU_Release( cpu_self );


I don't think anything changed in the latest sis (2.11). I get the same error in 2.10.

(SMP debugging is not working well in sis - I am trying to improve it ...)


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