Break points with latest SIS

[Jiri Gaisler]

Hello Sebastian,

here is a patch for RSB that improves sis debugging in gdb and on SMP systems:

* Correct break-point handling in gdb

* Detect and break on NULL pointer derefence (call/jump)

* Single stepping (stepi) in gdb/sis keeps focus on debugged cpu

* 'sim cpu' command shows active cpu in gdb, 'sim cpu x' switches gdb focus to cpu x (needs stepi afterwards)

* Trace buffer works in gdb

 I still have more fixes in the pipeline (symbol handling, tab expansion, documentation) but I thought I provide a patch of what I have now to help you in your debugging. I will also be away skiing next week so there will not be much progress in near term.

Below is a debug session of your failing SMP program as an example:


$ ~/src/gdb/sparc/gdb/gdb  ./sparc-rtems5/c/leon3/testsuites/smptests/smpswitchextension01.exe

Reading symbols from ./sparc-rtems5/c/leon3/testsuites/smptests/smpswitchextension01.exe...
(gdb) tar sim -leon3 -m 4
Connected to the simulator.
(gdb) load
(gdb) sim hi 5
trace history length = 5
(gdb) run
Starting program: /home/jiri/src/rtems/leon3mp2/sparc-rtems5/c/leon3/testsuites/smptests/smpswitchextension01.exe
Waking CPU 1


*** BEGIN OF TEST SMPSWITCHEXTENSION 1 ***
*** TEST VERSION: 5.0.0.03fcbb15d24e2eec41bac9f5dee30bbf7dc888b8-modified
*** TEST STATE: EXPECTED-PASS
*** TEST BUILD: RTEMS_DEBUG RTEMS_NETWORKING RTEMS_POSIX_API RTEMS_SMP
*** TEST TOOLS: 7.4.0 20181206 (RTEMS 5, RSB c41b9d0df7e5b4a5056ca50c2534380a44e92769, Newlib 3e24fbf6f)

Program received signal SIGSEGV, Segmentation fault.
0x4000a2e4 in _User_extensions_Thread_switch (heir=0x4
    0027aa8 <_RTEMS_tasks_Objects+3936>, executing
    =<optimized out>) at /home/jiri/ibm/src/rtems/rtems/cpukit
   /include/rtems/score/userextimpl.h:280
280          (*extension->thread_switch)( executing, heir );

(gdb) list
275    
276        while ( node != tail ) {
277          const User_extensions_Switch_control *extension =
278            (const User_extensions_Switch_control *) node;
279    
280          (*extension->thread_switch)( executing, heir );
281    
282          node = _Chain_Immutable_next( node );
283        }
284   

(gdb) sim cpu
active cpu: 1
(gdb) sim hi
   243329  4000a2f0  80a74016  cmp  %i5, %l6
   243331  4000a2f4  32bffffb  bne,a   0x000000004000a2e0
   243332  4000a2f8  c2076008  ld  [ %i5 + 8 ], %g1
   243334  4000a2e0  9210001c  mov  %i4, %o1
   243335  4000a2e4  9fc04000  call  %g1

(gdb) sim reg

      INS       LOCALS      OUTS     GLOBALS
   0:  40029740   F3000FC7   40027FC8   00000000
   1:  F34000E6   40029850   40027AA8   00000000
   2:  F30000E6   40006F04   40028238   00000013
   3:  40029740   40027FC8   0000000B   40029854
   4:  40027AA8   4002985C   80000000   80000000
   5:  00000000   40029858   40029010   00000000
   6:  40031240   400264B8   400311A8   40029740
   7:  40006FC8   40026400   4000A2E4   00000000

 psr: F3900FE7   wim: 00000004   tbr: 40000890   y: 00000A6A

  pc: 4000A2E4 = 9FC04000    call  %g1
 npc: 4000A2E8 = 90100013    mov  %l3, %o0
 IU in error mode

Run again

(gdb) load

(gdb) bre switcher
Breakpoint 1 at 0x40001794: file /home/jiri/ibm/src/rtems/rtems/c/src/../../testsuites/smptests/smpswitchextension01/init.c, line 109.

(gdb) run
Starting program: /home/jiri/src/rtems/leon3mp2/sparc-rtems5/c/leon3/testsuites/smptests/smpswitchextension01.exe
Waking CPU 1


*** BEGIN OF TEST SMPSWITCHEXTENSION 1 ***
*** TEST VERSION: 5.0.0.03fcbb15d24e2eec41bac9f5dee30bbf7dc888b8-modified
*** TEST STATE: EXPECTED-PASS
*** TEST BUILD: RTEMS_DEBUG RTEMS_NETWORKING RTEMS_POSIX_API RTEMS_SMP
*** TEST TOOLS: 7.4.0 20181206 (RTEMS 5, RSB c41b9d0df7e5b4a5056ca50c2534380a44e92769, Newlib 3e24fbf6f)

Breakpoint 1, switcher (self=0) at /home/jiri/ibm/src/rtems/rt
   ems/c/src/../../testsuites/smptests/smpswitchextension01/init.c:109
109    {
(gdb) sim cpu
active cpu: 0
(gdb) sim hi
   180980  40001794  9de3bfa0  save  %sp, -96, %sp
   180972  4000bb18  9de3bfa0  save  %sp, -96, %sp
   180973  4000bb1c  c206216c  ld  [ %i0 + 0x16c ], %g1
   180975  4000bb20  9fc04000  call  %g1
   180978  4000bb24  d0062170  ld  [ %i0 + 0x170 ], %o0
(gdb) sim cpu 1
active cpu: 1
(gdb) sim hi
   180992  400139fc  9207bff8  add  %fp, -8, %o1
   180993  40013a00  40001c79  call  0x000000004001abe4
   180994  40013a04  9010001b  mov  %i3, %o0
   180995  4001abe4  d0226004  st  %o0, [ %o1 + 4 ]
   180998  4001abe8  c2020000  ld  [ %o0 ], %g1
(gdb) stepi
0x4001abf0    274      return atomic_fetch_add_explicit( obj, arg, order );
(gdb)


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