RTEMS on embedded CPUs(RISCV)

Sebastian Huber sebastian.huber at embedded-brains.de
Wed Jun 5 05:11:09 UTC 2019


Hello Sachin,

On 05/06/2019 06:15, sachin.ghadi at sifive.com wrote:
>
> Hi RTEMS dev team,
>
> I don’t know if I should send this query to users list or developer list.
>
> I am working on the getting RTEMS BSP ported on the one of RISC-V 
> based SoC.
>
> Current RTEMS has support only for Spike simulator.
>

we have also support for Qemu. At least at some point in time it worked 
with a non-upstream Qemu. I am not sure how far the upstreaming of the 
Qemu support progressed in the last months.

> It looks like RTEMS does not fit very well on the systems having less RAM.
>
> We have 64K of RAM on our standard FPGA development kit for our E 
> series embedded cores.
>

64KiB for code and data is a challenge for RTEMS. You have to tinker 
with the configuration and reduce the feature set to get into this range.

> All of the RTEMS test does not fit within this given RAM and linker 
> throws error.
>
> Regarding this I have few questions
>
>  1. Does RTEMS accept support for new core with limited tests passing?
>     Or one need full test suit passing to qualify complete test?
>

What do you mean with "new core"? I think we already support the 
practically relevant ISA combinations:

bsps/riscv/riscv/config/rv32iac.cfg
bsps/riscv/riscv/config/rv32i.cfg
bsps/riscv/riscv/config/rv32imac.cfg
bsps/riscv/riscv/config/rv32imafc.cfg
bsps/riscv/riscv/config/rv32imafdc.cfg
bsps/riscv/riscv/config/rv32imafd.cfg
bsps/riscv/riscv/config/rv32im.cfg
bsps/riscv/riscv/config/rv64imac.cfg
bsps/riscv/riscv/config/rv64imac_medany.cfg
bsps/riscv/riscv/config/rv64imafdc.cfg
bsps/riscv/riscv/config/rv64imafd.cfg
bsps/riscv/riscv/config/rv64imafdc_medany.cfg
bsps/riscv/riscv/config/rv64imafd_medany.cfg

We have couple of BSP for other architectures (e.g. ARM, PowerPC) that 
cannot run all tests.

> 1.
>  2. I saw some thread regarding tinyRTEMS
>
> https://devel.rtems.org/wiki/Projects/TinyRTEMS
>
> Is there any plan for this to support as separate port for embedded 
> cores with limited resources?
>

I don't think someone is actively working on this. This wiki page is out 
of date and needs an update. The next step to get a real size reduction 
would be self-contained threads. This way we get rid of all the objects 
support and the heap.

-- 
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
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