Need help figuring out why ARM hits data_abort right after hitting Exception_interrupt
Richi Dubey
richidubey at gmail.com
Wed Aug 19 07:18:06 UTC 2020
Hi,
This mail is in continuation of
https://lists.rtems.org/pipermail/devel/2020-August/061446.html.
Right after the check_cpu_allocation test for the last action gets passed
(code here
<https://github.com/richidubey/rtems/blob/6e455a5d77417dcbc2f00330ebc37a7a143c5384/testsuites/smptests/smpstrongapa01/init.c#L125>),
_ARMV4_Exception_interrupt
gets called when the timer function finishes.
But soon thereafter _ARMV4_Exception_data_abort_default occurs. Why does
that happen? I believe it might have something to do with the fact that T0
(the task that was earlier running on processor 0 and was responsible for
running the timer function and later returning to Init) has changed its
processor to processor 2 (as we know since the check_cpu_allocation passed).
Gdb trace is:
-------------------------------------------------------------------------------------------------------------------------
Thread 1 hit Breakpoint 7, check_cpu_allocations (ctx=0x20055c
<test_instance>, action=0x11fb7c <test_actions+260>) at
/home/richi/quick-start/src/rtems/c/src/../../testsuites/smptests/smpstrongapa01/init.c:194
(gdb) print *action
$57 = {
kind = KIND_SET_PRIORITY,
index = T2,
data = {
priority = 4,
cpu_set = 0
},
expected_cpu_allocations = "\002\001"
}
0x00100dd6 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100dd8 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e6a 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e6c 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e6e 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100ddc 199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100dde 199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100de0 199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100de2 199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100de4 199 e = action->expected_cpu_allocations[i];
(gdb)
200 c = _Per_CPU_Get_by_index(i);
(gdb) p e
$39 = T2
(gdb) ni
0x00100de8 200 c = _Per_CPU_Get_by_index(i);
(gdb)
0x00100dec 200 c = _Per_CPU_Get_by_index(i);
(gdb)
201 h = c->heir;
(gdb)
0x00100df0 201 h = c->heir;
(gdb) p c
$40 = (const Per_CPU_Control *) 0x203580 <_Per_CPU_Information>
(gdb) ni
0x00100df2 201 h = c->heir;
(gdb)
203 if (e != IDLE) {
(gdb) p h
$41 = (const Thread_Control *) 0x2025e8 <_RTEMS_tasks_Objects+3864>
(gdb) ni
0x00100df6 203 if (e != IDLE) {
(gdb)
0x00100df8 203 if (e != IDLE) {
(gdb)
204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100dfc 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb) p h->Object.id
$42 = 167837700
(gdb) p ctx->task_ids[e]
$43 = 167837700
(gdb) ni
0x00100dfe 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e00 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e02 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e04 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e08 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e0a 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e66 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e68 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e6a 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e6c 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e6e 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100ddc 199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100dde 199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100de0 199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100de2 199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100de4 199 e = action->expected_cpu_allocations[i];
(gdb)
200 c = _Per_CPU_Get_by_index(i);
(gdb) ni
0x00100de8 200 c = _Per_CPU_Get_by_index(i);
(gdb)
0x00100dec 200 c = _Per_CPU_Get_by_index(i);
(gdb)
201 h = c->heir;
(gdb)
0x00100df0 201 h = c->heir;
(gdb)
0x00100df2 201 h = c->heir;
(gdb)
203 if (e != IDLE) {
(gdb)
0x00100df6 203 if (e != IDLE) {
(gdb)
0x00100df8 203 if (e != IDLE) {
(gdb)
204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb) p c
$44 = (const Per_CPU_Control *) 0x203780 <_Per_CPU_Information+512>
(gdb) p _Per_CPU_Get_index( c )
$45 = 1
(gdb) ni
0x00100dfc 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb) p e
$46 = T1
(gdb) p h->Object.id
$47 = 167837699
(gdb) p ctx->task_ids[e]
$48 = 167837699
(gdb) ni
0x00100dfe 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e00 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e02 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e04 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e08 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e0a 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e66 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e68 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e6a 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e6c 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e6e 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100ddc 199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100dde 199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100de0 199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100de2 199 e = action->expected_cpu_allocations[i];
(gdb)
0x00100de4 199 e = action->expected_cpu_allocations[i];
(gdb)
200 c = _Per_CPU_Get_by_index(i);
(gdb) p e
$49 = T0
(gdb) p c
$50 = (const Per_CPU_Control *) 0x203780 <_Per_CPU_Information+512>
(gdb) ni
0x00100de8 200 c = _Per_CPU_Get_by_index(i);
(gdb)
0x00100dec 200 c = _Per_CPU_Get_by_index(i);
(gdb)
201 h = c->heir;
(gdb)
0x00100df0 201 h = c->heir;
(gdb)
0x00100df2 201 h = c->heir;
(gdb)
203 if (e != IDLE) {
(gdb)
0x00100df6 203 if (e != IDLE) {
(gdb) p _Per_CPU_Get_index( c )
$51 = 2
(gdb) ni
0x00100df8 203 if (e != IDLE) {
(gdb)
204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100dfc 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb) p h->Object.id
$52 = 167837698
(gdb) p ctx->task_ids[e]
$53 = 167837698
(gdb) ni
0x00100dfe 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e00 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e02 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e04 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e08 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
0x00100e0a 204 rtems_test_assert(h->Object.id == ctx->task_ids[e]);
(gdb)
194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e66 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e68 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e6a 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e6c 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
0x00100e6e 194 for (i = 0; i < CPU_COUNT; ++i) {
(gdb)
209 }
(gdb)
0x00100e72 209 }
(gdb)
0x00100e74 209 }
(gdb)
0x00100e76 209 }
(gdb)
timer (id=302055425, arg=0x20055c <test_instance>) at
/home/richi/quick-start/src/rtems/c/src/../../testsuites/smptests/smpstrongapa01/init.c:260
260 sc = rtems_timer_reset(id);
(gdb) ni
0x00100fe0 260 sc = rtems_timer_reset(id);
(gdb)
0x00100fe4 260 sc = rtems_timer_reset(id);
(gdb)
261 rtems_test_assert(sc == RTEMS_SUCCESSFUL);
(gdb) ni
0x00100fe8 261 rtems_test_assert(sc == RTEMS_SUCCESSFUL);
(gdb)
0x00100fea 261 rtems_test_assert(sc == RTEMS_SUCCESSFUL);
(gdb)
269 }
(gdb)
0x00101084 269 }
(gdb)
0x00101086 269 }
(gdb)
0x00101088 269 }
(gdb)
_Timer_Routine_adaptor (the_watchdog=0x2005e8 <_Timer_Objects+16>) at
/home/richi/quick-start/src/rtems/c/src/../../cpukit/rtems/src/timercreate.c:49
49 }
(gdb)
0x00108f86 49 }
(gdb)
0x00108f88 49 }
(gdb)
0x00108f8a 49 }
(gdb)
_Watchdog_Do_tickle (header=0x2036a8 <_Per_CPU_Information+296>,
first=0x2005e8 <_Timer_Objects+16>, now=170, lock=0x203698
<_Per_CPU_Information+280>, lock_context=0x207e6c
<_ISR_Stack_area_begin+2860>) at
/home/richi/quick-start/src/rtems/c/src/../../cpukit/score/src/watchdogtick.c:45
45 _ISR_lock_ISR_disable_and_acquire( lock, lock_context );
(gdb)
0x00113dfa 45 _ISR_lock_ISR_disable_and_acquire( lock, lock_context );
(gdb)
0x00113dfc 45 _ISR_lock_ISR_disable_and_acquire( lock, lock_context );
(gdb)
0x00113dfe 45 _ISR_lock_ISR_disable_and_acquire( lock, lock_context );
(gdb)
0x00113e00 45 _ISR_lock_ISR_disable_and_acquire( lock, lock_context );
(gdb)
50 first = _Watchdog_Header_first( header );
(gdb)
0x00113e06 50 first = _Watchdog_Header_first( header );
(gdb)
0x00113e0a 50 first = _Watchdog_Header_first( header );
(gdb)
51 } while ( first != NULL );
(gdb)
0x00113e0e 51 } while ( first != NULL );
(gdb)
0x00113e10 51 } while ( first != NULL );
(gdb)
35 if ( first->expire <= now ) {
(gdb)
0x00113db4 35 if ( first->expire <= now ) {
(gdb)
0x00113db8 35 if ( first->expire <= now ) {
(gdb)
0x00113dbc 35 if ( first->expire <= now ) {
(gdb)
0x00113dbe 35 if ( first->expire <= now ) {
(gdb)
0x00113dc0 35 if ( first->expire <= now ) {
(gdb)
0x00113dc2 35 if ( first->expire <= now ) {
(gdb)
47 break;
(gdb)
52 }
(gdb)
0x00113e18 52 }
(gdb)
0x00113e1a 52 }
(gdb)
0x00113e1c 52 }
(gdb)
_Watchdog_Tick (cpu=0x203580 <_Per_CPU_Information>) at
/home/richi/quick-start/src/rtems/c/src/../../cpukit/score/src/watchdogtick.c:86
86 header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_MONOTONIC ];
(gdb)
0x00113eae 86 header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_MONOTONIC ];
(gdb)
0x00113eb2 86 header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_MONOTONIC ];
(gdb)
87 first = _Watchdog_Header_first( header );
(gdb)
0x00113eb6 87 first = _Watchdog_Header_first( header );
(gdb)
0x00113eba 87 first = _Watchdog_Header_first( header );
(gdb)
89 if ( first != NULL ) {
(gdb)
0x00113ebe 89 if ( first != NULL ) {
(gdb)
0x00113ec0 89 if ( first != NULL ) {
(gdb)
100 header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_REALTIME ];
(gdb)
0x00113ef2 100 header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_REALTIME ];
(gdb)
0x00113ef6 100 header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_REALTIME ];
(gdb)
101 first = _Watchdog_Header_first( header );
(gdb)
0x00113efa 101 first = _Watchdog_Header_first( header );
(gdb)
0x00113efe 101 first = _Watchdog_Header_first( header );
(gdb)
103 if ( first != NULL ) {
(gdb)
0x00113f02 103 if ( first != NULL ) {
(gdb)
0x00113f04 103 if ( first != NULL ) {
(gdb)
114 _ISR_lock_Release_and_ISR_enable( &cpu->Watchdog.Lock, &lock_context );
(gdb)
0x00113f36 114 _ISR_lock_Release_and_ISR_enable( &cpu->Watchdog.Lock,
&lock_context );
(gdb)
0x00113f3a 114 _ISR_lock_Release_and_ISR_enable( &cpu->Watchdog.Lock,
&lock_context );
(gdb)
0x00113f3e 114 _ISR_lock_Release_and_ISR_enable( &cpu->Watchdog.Lock,
&lock_context );
(gdb)
0x00113f40 114 _ISR_lock_Release_and_ISR_enable( &cpu->Watchdog.Lock,
&lock_context );
(gdb)
0x00113f42 114 _ISR_lock_Release_and_ISR_enable( &cpu->Watchdog.Lock,
&lock_context );
(gdb)
116 _Scheduler_Tick( cpu );
(gdb)
0x00113f48 116 _Scheduler_Tick( cpu );
(gdb)
117 }
(gdb)
0x00113f4e 117 }
(gdb)
0x00113f50 117 }
(gdb)
0x00113f52 117 }
(gdb)
_Timecounter_Tick () at
/home/richi/quick-start/src/rtems/c/src/../../cpukit/score/src/kern_tc.c:2139
2139 }
(gdb)
0x00116994 2139 }
(gdb)
0x00116996 2139 }
(gdb)
0x00116998 2139 }
(gdb)
rtems_timecounter_tick () at
/home/richi/quick-start/src/rtems/cpukit/include/rtems/timecounter.h:86
86 }
(gdb)
0x0010155c 86 }
(gdb)
0x00101864 in Clock_driver_timecounter_tick () at
/home/richi/quick-start/src/rtems/bsps/arm/include/../../shared/dev/clock/clockimpl.h:93
93 rtems_timecounter_tick();
(gdb)
87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x00101882 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x00101884 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x00101886 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x00101888 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x0010188a 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x0010188c 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
90 cpu = _Per_CPU_Get_by_index( cpu_index );
(gdb)
0x0010184e 90 cpu = _Per_CPU_Get_by_index( cpu_index );
(gdb)
0x00101852 90 cpu = _Per_CPU_Get_by_index( cpu_index );
(gdb)
92 if ( _Per_CPU_Is_boot_processor( cpu ) ) {
(gdb)
0x00101856 92 if ( _Per_CPU_Is_boot_processor( cpu ) ) {
(gdb)
0x0010185a 92 if ( _Per_CPU_Is_boot_processor( cpu ) ) {
(gdb)
0x0010185c 92 if ( _Per_CPU_Is_boot_processor( cpu ) ) {
(gdb)
0x0010185e 92 if ( _Per_CPU_Is_boot_processor( cpu ) ) {
(gdb)
94 } else if ( _Processor_mask_Is_set( _SMP_Get_online_processors(),
cpu_index ) ) {
(gdb)
0x0010186a 94 } else if ( _Processor_mask_Is_set(
_SMP_Get_online_processors(), cpu_index ) ) {
(gdb)
0x0010186c 94 } else if ( _Processor_mask_Is_set(
_SMP_Get_online_processors(), cpu_index ) ) {
(gdb)
0x0010186e 94 } else if ( _Processor_mask_Is_set(
_SMP_Get_online_processors(), cpu_index ) ) {
(gdb)
0x00101870 94 } else if ( _Processor_mask_Is_set(
_SMP_Get_online_processors(), cpu_index ) ) {
(gdb)
0x00101874 94 } else if ( _Processor_mask_Is_set(
_SMP_Get_online_processors(), cpu_index ) ) {
(gdb)
0x00101876 94 } else if ( _Processor_mask_Is_set(
_SMP_Get_online_processors(), cpu_index ) ) {
(gdb)
0x00101878 94 } else if ( _Processor_mask_Is_set(
_SMP_Get_online_processors(), cpu_index ) ) {
(gdb)
95 _Watchdog_Tick( cpu );
(gdb)
0x0010187c 95 _Watchdog_Tick( cpu );
(gdb)
87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x00101882 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x00101884 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x00101886 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x00101888 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x0010188a 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x0010188c 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
90 cpu = _Per_CPU_Get_by_index( cpu_index );
(gdb)
0x0010184e 90 cpu = _Per_CPU_Get_by_index( cpu_index );
(gdb)
0x00101852 90 cpu = _Per_CPU_Get_by_index( cpu_index );
(gdb)
92 if ( _Per_CPU_Is_boot_processor( cpu ) ) {
(gdb)
0x00101856 92 if ( _Per_CPU_Is_boot_processor( cpu ) ) {
(gdb)
0x0010185a 92 if ( _Per_CPU_Is_boot_processor( cpu ) ) {
(gdb)
0x0010185c 92 if ( _Per_CPU_Is_boot_processor( cpu ) ) {
(gdb)
0x0010185e 92 if ( _Per_CPU_Is_boot_processor( cpu ) ) {
(gdb)
94 } else if ( _Processor_mask_Is_set( _SMP_Get_online_processors(),
cpu_index ) ) {
(gdb)
0x0010186a 94 } else if ( _Processor_mask_Is_set(
_SMP_Get_online_processors(), cpu_index ) ) {
(gdb)
0x0010186c 94 } else if ( _Processor_mask_Is_set(
_SMP_Get_online_processors(), cpu_index ) ) {
(gdb)
0x0010186e 94 } else if ( _Processor_mask_Is_set(
_SMP_Get_online_processors(), cpu_index ) ) {
(gdb)
0x00101870 94 } else if ( _Processor_mask_Is_set(
_SMP_Get_online_processors(), cpu_index ) ) {
(gdb)
0x00101874 94 } else if ( _Processor_mask_Is_set(
_SMP_Get_online_processors(), cpu_index ) ) {
(gdb)
0x00101876 94 } else if ( _Processor_mask_Is_set(
_SMP_Get_online_processors(), cpu_index ) ) {
(gdb)
0x00101878 94 } else if ( _Processor_mask_Is_set(
_SMP_Get_online_processors(), cpu_index ) ) {
(gdb)
95 _Watchdog_Tick( cpu );
(gdb)
0x0010187c 95 _Watchdog_Tick( cpu );
(gdb)
87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x00101882 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x00101884 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x00101886 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x00101888 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x0010188a 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
0x0010188c 87 for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
(gdb)
101 }
(gdb)
0x00101890 101 }
(gdb)
0x00101892 101 }
(gdb)
0x00101894 101 }
(gdb)
Clock_isr (arg=0x0) at
/home/richi/quick-start/src/rtems/bsps/arm/include/../../shared/dev/clock/clockimpl.h:153
153 if (_SMP_Get_processor_maximum() == 1) {
(gdb)
0x0010190e 153 if (_SMP_Get_processor_maximum() == 1) {
(gdb)
0x00101910 153 if (_SMP_Get_processor_maximum() == 1) {
(gdb)
0x00101912 153 if (_SMP_Get_processor_maximum() == 1) {
(gdb)
168 Clock_driver_support_at_tick();
(gdb)
195 }
(gdb)
0x00101974 195 }
(gdb)
0x00101976 195 }
(gdb)
0x00101978 195 }
(gdb)
bsp_interrupt_handler_dispatch (vector=27) at
/home/richi/quick-start/src/rtems/bsps/include/bsp/irq-generic.h:274
274 e = e->next;
(gdb)
0x0010219a 274 e = e->next;
(gdb)
0x0010219c 274 e = e->next;
(gdb)
275 } while (e != NULL);
(gdb)
0x001021a0 275 } while (e != NULL);
(gdb)
0x001021a2 275 } while (e != NULL);
(gdb)
279 }
(gdb)
279 }
(gdb)
0x001021ae 279 }
(gdb)
0x001021b0 279 }
(gdb)
0x001021b2 279 }
(gdb)
bsp_interrupt_dispatch () at
/home/richi/quick-start/src/rtems/c/src/lib/libbsp/arm/realview-pbx-a9/../../../../../../bsps/arm/shared/irq/irq-gic.c:68
68 _ARMV4_Status_restore(psr);
(gdb)
0x001021ee 68 _ARMV4_Status_restore(psr);
(gdb)
70 cpuif->icceoir = icciar;
(gdb)
0x001021f4 70 cpuif->icceoir = icciar;
(gdb)
0x001021f6 70 cpuif->icceoir = icciar;
(gdb)
72 }
(gdb)
0x001021fa 72 }
(gdb)
0x001021fc 72 }
(gdb)
0x001021fe 72 }
(gdb)
_ARMV4_Exception_interrupt () at
/home/richi/quick-start/src/rtems/c/src/../../cpukit/score/cpu/arm/arm_exc_interrupt.S:134
134 ldr r0, [SELF_CPU_CONTROL, #PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL]
(gdb)
135 ldrb r1, [SELF_CPU_CONTROL, #PER_CPU_DISPATCH_NEEDED]
(gdb)
136 ldr r2, [SELF_CPU_CONTROL, #PER_CPU_ISR_DISPATCH_DISABLE]
(gdb)
137 ldr r3, [SELF_CPU_CONTROL, #PER_CPU_ISR_NEST_LEVEL]
(gdb)
140 mov sp, NON_VOLATILE_SCRATCH
(gdb)
_ARMV4_Exception_interrupt () at
/home/richi/quick-start/src/rtems/c/src/../../cpukit/score/cpu/arm/arm_exc_interrupt.S:143
143 mrs NON_VOLATILE_SCRATCH, CPSR
(gdb)
146 eor r1, r0
(gdb)
147 sub r0, #1
(gdb)
148 orr r1, r0
(gdb)
149 orr r1, r2
(gdb)
150 sub r3, #1
(gdb)
153 str r0, [SELF_CPU_CONTROL, #PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL]
(gdb)
154 str r3, [SELF_CPU_CONTROL, #PER_CPU_ISR_NEST_LEVEL]
(gdb)
160 cmp r1, #0
(gdb)
161 bne .Lthread_dispatch_done
(gdb)
164 mrs NON_VOLATILE_SCRATCH, CPSR
(gdb)
169 mov r0, #1
(gdb)
170 str r0, [SELF_CPU_CONTROL, #PER_CPU_ISR_DISPATCH_DISABLE]
(gdb)
171 str r0, [SELF_CPU_CONTROL, #PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL]
(gdb)
174 mov r0, SELF_CPU_CONTROL
(gdb)
175 mov r1, NON_VOLATILE_SCRATCH
(gdb)
176 mov r2, #0x80
(gdb)
177 bic r1, r2
(gdb)
178 BLX_TO_THUMB_1 _Thread_Do_dispatch
(gdb)
Thread 1 hit Breakpoint 2, _ARMV4_Exception_data_abort_default () at
/home/richi/quick-start/src/rtems/c/src/../../cpukit/score/cpu/arm/armv4-exception-default.S:70
70 sub sp, #MORE_CONTEXT_SIZE
(gdb)
71 stmdb sp!, {r0-r12}
(gdb)
72 mov r4, #4
(gdb)
74 b save_more_context
(gdb)
save_more_context () at
/home/richi/quick-start/src/rtems/c/src/../../cpukit/score/cpu/arm/armv4-exception-default.S:112
112 mov r2, lr
(gdb)
113 mrs r3, spsr
(gdb)
114 mrs r7, cpsr
(gdb)
115 orr r5, r3, #ARM_PSR_I
(gdb)
116 bic r5, #ARM_PSR_T
(gdb)
117 msr cpsr, r5
----------------------------------------------------------------------------------------------------------------
Please advise on what I should do? Is there a way to let the BSP know that
the CPU related to the timer has changed?
Thanks,
Richi.
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