[PATCH v3 1/2] bsps: Fix GICv3 arm_gic_trigger_sgi()

Sebastian Huber sebastian.huber at embedded-brains.de
Thu Dec 10 07:24:39 UTC 2020


Use the targets parameter to determine the targets of the SGI.  Change
targets parameter type to 32-bit to ease the parameter passing.  GICv3
supports up to 16 targets.

Update #4202.
---
v2: Fix tm27 test support.

v3: Use arm_cp15_get_multiprocessor_affinity() to determine the tm27 SGI
    target.

 bsps/arm/shared/start/arm-a9mpcore-smp.c | 2 +-
 bsps/include/dev/irq/arm-gic-irq.h       | 4 ++--
 bsps/include/dev/irq/arm-gic-tm27.h      | 9 +++++----
 bsps/shared/dev/irq/arm-gicv2.c          | 2 +-
 bsps/shared/dev/irq/arm-gicv3.c          | 4 ++--
 5 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/bsps/arm/shared/start/arm-a9mpcore-smp.c b/bsps/arm/shared/start/arm-a9mpcore-smp.c
index dd0512648c..5527cd2fa9 100644
--- a/bsps/arm/shared/start/arm-a9mpcore-smp.c
+++ b/bsps/arm/shared/start/arm-a9mpcore-smp.c
@@ -60,6 +60,6 @@ void _CPU_SMP_Send_interrupt( uint32_t target_processor_index )
   arm_gic_irq_generate_software_irq(
     ARM_GIC_IRQ_SGI_0,
     ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
-    (uint8_t) (1U << target_processor_index)
+    1U << target_processor_index
   );
 }
diff --git a/bsps/include/dev/irq/arm-gic-irq.h b/bsps/include/dev/irq/arm-gic-irq.h
index d63fce32d1..ae0a68f7bb 100644
--- a/bsps/include/dev/irq/arm-gic-irq.h
+++ b/bsps/include/dev/irq/arm-gic-irq.h
@@ -88,13 +88,13 @@ typedef enum {
 void arm_gic_trigger_sgi(
   rtems_vector_number vector,
   arm_gic_irq_software_irq_target_filter filter,
-  uint8_t targets
+  uint32_t targets
 );
 
 static inline rtems_status_code arm_gic_irq_generate_software_irq(
   rtems_vector_number vector,
   arm_gic_irq_software_irq_target_filter filter,
-  uint8_t targets
+  uint32_t targets
 )
 {
   rtems_status_code sc = RTEMS_SUCCESSFUL;
diff --git a/bsps/include/dev/irq/arm-gic-tm27.h b/bsps/include/dev/irq/arm-gic-tm27.h
index 95f3077716..bfec3b22e0 100644
--- a/bsps/include/dev/irq/arm-gic-tm27.h
+++ b/bsps/include/dev/irq/arm-gic-tm27.h
@@ -31,6 +31,7 @@
 
 #include <bsp.h>
 #include <bsp/irq.h>
+#include <libcpu/arm-cp15.h>
 
 #define MUST_WAIT_FOR_INTERRUPT 1
 
@@ -79,8 +80,8 @@ static inline void Cause_tm27_intr(void)
 {
   rtems_status_code sc = arm_gic_irq_generate_software_irq(
     ARM_GIC_TM27_IRQ_LOW,
-    ARM_GIC_IRQ_SOFTWARE_IRQ_TO_SELF,
-    0
+    ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
+    1U << (arm_cp15_get_multiprocessor_affinity() & 0xff)
   );
   assert(sc == RTEMS_SUCCESSFUL);
 }
@@ -94,8 +95,8 @@ static inline void Lower_tm27_intr(void)
 {
   rtems_status_code sc = arm_gic_irq_generate_software_irq(
     ARM_GIC_TM27_IRQ_HIGH,
-    ARM_GIC_IRQ_SOFTWARE_IRQ_TO_SELF,
-    0
+    ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
+    1U << (arm_cp15_get_multiprocessor_affinity() & 0xff)
   );
   assert(sc == RTEMS_SUCCESSFUL);
 }
diff --git a/bsps/shared/dev/irq/arm-gicv2.c b/bsps/shared/dev/irq/arm-gicv2.c
index cba8982764..9560a90d6b 100644
--- a/bsps/shared/dev/irq/arm-gicv2.c
+++ b/bsps/shared/dev/irq/arm-gicv2.c
@@ -261,7 +261,7 @@ void bsp_interrupt_get_affinity(
 void arm_gic_trigger_sgi(
   rtems_vector_number vector,
   arm_gic_irq_software_irq_target_filter filter,
-  uint8_t targets
+  uint32_t targets
 )
 {
   volatile gic_dist *dist = ARM_GIC_DIST;
diff --git a/bsps/shared/dev/irq/arm-gicv3.c b/bsps/shared/dev/irq/arm-gicv3.c
index db10371c72..2bedaefcef 100644
--- a/bsps/shared/dev/irq/arm-gicv3.c
+++ b/bsps/shared/dev/irq/arm-gicv3.c
@@ -340,7 +340,7 @@ void bsp_interrupt_get_affinity(
 void arm_gic_trigger_sgi(
   rtems_vector_number vector,
   arm_gic_irq_software_irq_target_filter filter,
-  uint8_t targets
+  uint32_t targets
 )
 {
   /* TODO(kmoore) Handle filter:
@@ -356,7 +356,7 @@ void arm_gic_trigger_sgi(
   uint64_t value = ICC_SGIR_AFFINITY2(MPIDR_AFFINITY2_GET(mpidr))
                  | ICC_SGIR_INTID(vector)
                  | ICC_SGIR_AFFINITY1(MPIDR_AFFINITY1_GET(mpidr))
-                 | ICC_SGIR_CPU_TARGET_LIST(1);
+                 | ICC_SGIR_CPU_TARGET_LIST(targets);
 #ifndef ARM_MULTILIB_ARCH_V4
   value |= ICC_SGIR_AFFINITY3(MPIDR_AFFINITY3_GET(mpidr));
 #endif
-- 
2.26.2



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