[PATCH v1 0/1] bsps/pc386: Fix IPI for non-consecutive Apic IDs
Jan.Sommer at dlr.de
Jan.Sommer at dlr.de
Mon Jul 20 20:59:26 UTC 2020
> -----Original Message-----
> From: Gedare Bloom [mailto:gedare at rtems.org]
> Sent: Monday, July 20, 2020 10:12 PM
> To: Sommer, Jan
> Cc: devel at rtems.org
> Subject: Re: [PATCH v1 0/1] bsps/pc386: Fix IPI for non-consecutive Apic IDs
> Hi Jan,
> Slightly off-topic, but which Intel Atom board are you using? If you
> can say, and if your board has non-legacy boot, how did you get
> through the boot sequence?
We use one of these boards from RTD with an E38xx Atom: https://www.rtd.com/PC104/CM/CML24BT/CML24BT.htm
I can't check the boot settings from home office, but if I remember correctly we use the BIOS for booting (I assume that is the legacy mode?).
I compiled iPXE and boot it from an usb flash drive and then load and run the RTEMS applications via tftp.
Maybe using the approach of the x86_64 BSP via the FreeBSD loader could work with modern UEFIs?
> That has been a trouble for some folks
> On Fri, Jul 3, 2020 at 6:32 AM Jan Sommer <jan.sommer at dlr.de> wrote:
> > Hi,
> > I had some time for more hardware testing of the SMP functionality on a
> > PC.
> > It turns out I missed a few places where the APICID <-> cpuid needed to be
> > translated.
> > This only occurs if the APIC Ids of different cores are not numbered
> > consecutively, which qemu does.
> > With this patch I can now run 52 examples on an Intel Atom with 4 cores.
> > The patch should apply to master and the 5 branch.
> > Did I understand it correctly, that for integrating the patch in the
> > RTEMS5 release, I need to first create a ticketr?
> > Best regards,
> > Jan
> > Jan Sommer (1):
> > bsps/pc386: Fix IPI for non-consecutive APICIDs
> > bsps/i386/pc386/start/smp-imps.c | 16 ++++++++++------
> > 1 file changed, 10 insertions(+), 6 deletions(-)
> > --
> > 2.17.1
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