Benchmarking RTEMS on PPC vs ARM multicore
gedare at rtems.org
Tue Jul 21 13:33:40 UTC 2020
On Mon, Jul 20, 2020 at 10:55 PM Sebastian Huber
<sebastian.huber at embedded-brains.de> wrote:
> Hello Gedare,
> what kind of performance benchmarking do you have in mind?
The immediate goal is going to be performance comparison of RTEMS in
baremetal vs hosted in a paravirtual environment. I haven't planned
out the experiment yet, but probably some microbenchmarks of common
operations, and maybe some application benchmarks if some make sense.
> To benchmark the clustered scheduling, you need at least a system with
> separated L2 caches, e.g. T4240 and LS1088A.
Thanks, that is not an immediate requirement for me, but good to know.
> We don't have BSPs for the QorIQ Layerscape platform. The chips are
> quite complex.
Also good to know.
> I haven't looked closely at the Xilinx Zynq but it seems they only have
> up to four cores and one L2 cache. We have a BSP for the Xilinx Zynq
> UltraScale+ (I neveer tested it). So maybe select one of them with 4
> core and the T2080.
Yeah, that was my initial thought as well after a brief discussion
with Joel. It would also be a good opportunity to put the UltraScale+
BSP to work.
Thanks for the thoughtful feedback, it has helped narrow the choices
down to two.
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