Offset locations of registers in ARM context-switch code

[Utkarsh Rai]

Hello,
The 'Context_Control' structure in score/.../arm/cpu.h has registers and
attributes that need to be saved during context-switching.
Some of these registers/attributes are conditionally compiled depending
upon the mode in which the processor is running. The registers are saved by
'ldr' instruction by providing proper offset form the context-control base
address. These offsets are dependent on the mode for which the compilation
is done.
For example, the 'is_executing' attribute has the following offset,
depending on various modes.
''
#ifdef RTEMS_SMP
  #if defined(ARM_MULTILIB_VFP)
    #define ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 112
  #elif defined(ARM_MULTILIB_HAS_THREAD_ID_REGISTER)
    #define ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 48
  #else
    #define ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 44
  #endif
#endif ''

My question is, what are the modes for which different registers in the
context control structure are compiled?
This is important to me as I have added a protected stack attribute to the
structure and I need to define a similar offset for this depending upon the
cpu mode.
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