[PATCH rtems v3 3/7] cpu/armv7m: Add table based init for ARMV7M_MPU

[Christian Mauderer]

On 19/11/2020 21:14, Gedare Bloom wrote:
> On Thu, Nov 19, 2020 at 1:13 PM Gedare Bloom <gedare at rtems.org> wrote:
>>
>> Hi Sebastian, Christian:
>>
>> I saw the req
> Oops, gmail shortcuts cut me off.
> 
> I saw the request to change the names, but I think the _ARMV7M_MPU_yyy
> is correct, because MPU is the capitalized first "word" of the
> subgroup there. It is consistent with the naming of other
> _ARMV7M_Xxx_yyy routines.

But there is for example

_ARMV7M_NVIC_Is_enabled
_ARMV7M_NVIC_Set_enable
_ARMV7M_DWT_Enable_CYCCNT
ARMV7M_MPU_Access_permissions

and some others in the same file. So I would lean towards what Sebastian
suggested. Otherwise the new functions wouldn't fit the scheme of the
existing ones.

> 
>>
>> On Thu, Nov 19, 2020 at 3:17 AM Christian Mauderer
>> <christian.mauderer at embedded-brains.de> wrote:
>>>
>>> Am 19.11.20 um 10:22 schrieb Christian Mauderer:
>>>> Am 19.11.20 um 10:15 schrieb Sebastian Huber:
>>>>>
>>>>> On 19/11/2020 09:51, Christian Mauderer wrote:
>>>>>> +  mpu = _ARMV7M_MPU;
>>>>>> +  scb = _ARMV7M_SCB;
>>>>>> +
>>>>>> +  scb->shcsr &= ~ARMV7M_SCB_SHCSR_MEMFAULTENA;
>>>>> I think it is not necessary to touch the shcsr. Disabling the MPU
>>>>> should be enough.
>>>>
>>>> OK. I'll try it on the imxrt.
>>>
>>> Seems to be no problem to remove that line. I'll do that before pushing.
>>>
>>>>
>>>>>> +  mpu->ctrl = 0;
>>>>>> +
>>>>>> +  _ARM_Data_synchronization_barrier();
>>>>>> +  _ARM_Instruction_synchronization_barrier();
>>>>>
>>>>
>>>
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