dl06 fails to build for RISC-V (griscv bsp)

Eshan Dhawan eshandhawan51 at gmail.com
Sun Sep 6 10:07:48 UTC 2020


The issue here is due to some changes in Newlib.
Which caused error in both riscv and arm.
The error in ARM is fixed.
But I don’t know about Riscv. 
> On 06-Sep-2020, at 2:43 PM, Hesham Almatary <hesham.almatary at cl.cam.ac.uk> wrote:
> 
> That's the same as [1]. I've seen that error before and (thought I)
> fixed it [2], but not sure what has changed since then.
> 
> [1] https://lists.rtems.org/pipermail/devel/2020-August/061717.html
> [2] https://github.com/RTEMS/rtems-tools/commit/e6e610d262940b7651157597b6b1406aa806b4d1
> 
>> On Sun, 6 Sep 2020 at 09:14, Chris Johns <chrisj at rtems.org> wrote:
>> 
>>> On 6/9/20 6:32 am, Jiri Gaisler wrote:
>>> I have updated both RTEMS and RSB to git head, and dl06 now fails to build:
>>> 
>>> riscv-rtems6-g++ -march=rv32imafd -mabi=ilp32d -O2 -g -ffunction-sections -fdata-sections -Wall      -Wl,--gc-sections  -march=rv32imafd -mabi=ilp32d  -B./../../lib/libbsp/riscv/griscv -B/home/jiri/ibm/src/rtems/rtems/bsps/riscv/griscv/start -specs bsp_specs -qrtems -L./../../cpukit -L/home/jiri/ibm/src/rtems/rtems/bsps/riscv/shared/start -Wl,--wrap=printf -Wl,--wrap=puts -Wl,--wrap=putchar -o dl05.exe dl05/dl05-init.o dl05/dl05-dl-load.o dl05/dl05-dl-cpp.o dl05-dl05-tar.o ../../lib/libbsp/riscv/griscv/librtemsbsp.a ../../cpukit/librtemscpu.a ../../cpukit/librtemstest.a dl05-sym.o
>> 
>> This is dl05 and I do not think it is related to the issue.
>> 
>>> rtems-ld -r /home/jiri/src/rtems/riscvmp/riscv-rtems6/c/griscv \
>>>  -C riscv-rtems6-gcc -c "-march=rv32imafd -mabi=ilp32d" \
>>>  -O rap -b dl06.pre -e rtems_main -s \
>>>  -o dl06.rap dl06-o1.o dl06-o2.o -lm
>>> error: rap::object: Section index '0' not found: dl06-o1.o
>>> Makefile:8528: recipe for target 'dl06.rap' failed
>>> make[5]: *** [dl06.rap] Error 10
>> 
>> This looks like something in rtems-ld in the rtems-tools.git repo.
>> 
>>> It seems like dl06-o1.o not built but a link is attempted - is dl06 supposed to be enabled or disabled for RISC-V ?
>> 
>> Enabled but it seems something has changed to cause the test to not link. I
>> wonder if a tool upgrade is the reason. I have raised ..
>> 
>> https://devel.rtems.org/ticket/4069
>> 
>> Chris
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