[PATCH v1 1/2] cpu-supplement: Fix formatting and missing words

Kinsey Moore kinsey.moore at oarcorp.com
Fri Sep 25 15:28:42 UTC 2020


---
 cpu-supplement/arm.rst | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/cpu-supplement/arm.rst b/cpu-supplement/arm.rst
index 63aa532..26d88ea 100644
--- a/cpu-supplement/arm.rst
+++ b/cpu-supplement/arm.rst
@@ -34,7 +34,7 @@ for the values.
 Count Leading Zeroes Instruction
 --------------------------------
 
-The ARMv5 and later has the count leading zeroes ``clz`` instruction which
+The ARMv5 and later instruction sets have the count leading zeroes ``clz`` instruction which
 could be used to speed up the find first bit operation.  The use of this
 instruction should significantly speed up the scheduling associated with a
 thread blocking.  This is currently not used.
@@ -130,7 +130,7 @@ Memory Model
 ============
 
 A flat 32-bit memory model is supported.  The board support package must take
-care about the MMU if necessary.
+care of initializing the MMU if necessary.
 
 Interrupt Processing
 ====================
@@ -196,11 +196,11 @@ Symmetric Multiprocessing
 
 SMP is supported on ARMv7-A.  Available platforms are
 
-- Altera Cyclone V,
+- Altera Cyclone V
 
-- NXP i.MX 7, and
+- NXP i.MX 7
 
-- Xilinx Zynq.
+- Xilinx Zynq
 
 Thread-Local Storage
 ====================
-- 
2.20.1



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