[PATCH] riscv/start: Startup sequence update.

[Gedare Bloom]

looks good. someone using riscv can build/test and push, any takers?

On Wed, Apr 28, 2021 at 7:55 AM Somesh Deshmukh
<someshdeshmukh07 at gmail.com> wrote:
>
> - The current startup sequence performs the call to the bsp_fdt_copy() and then
>   performs memset to the BSS region. In bsp_fdt_copy(), RTEMS allocates
>   memory for bsp_fdt_blob into BSS region which is yet to initialize. With
>   current startup sequence, the bsp_fdt_blob is getting erased after memset.
>   The proposed fix performs the BSS region memset operation and then performs a
>   call to the bsp_fdt_copy().
> ---
>  bsps/riscv/shared/start/start.S | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/bsps/riscv/shared/start/start.S b/bsps/riscv/shared/start/start.S
> index 04a62a26ce..277760a388 100644
> --- a/bsps/riscv/shared/start/start.S
> +++ b/bsps/riscv/shared/start/start.S
> @@ -74,17 +74,17 @@ SYM(_start):
>         LADDR   sp, _ISR_Stack_area_end
>  #endif
>
> +/* Clear .bss */
> +LADDR  a0, bsp_section_bss_begin
> +li     a1, 0
> +LADDR  a2, bsp_section_bss_size
> +call   memset
> +
>  #ifdef BSP_START_COPY_FDT_FROM_U_BOOT
>         mv      a0, a1
>         call    bsp_fdt_copy
>  #endif
>
> -       /* Clear .bss */
> -       LADDR   a0, bsp_section_bss_begin
> -       li      a1, 0
> -       LADDR   a2, bsp_section_bss_size
> -       call    memset
> -
>  #ifdef RTEMS_SMP
>         /* Give go to secondary processors */
>         LADDR   t0, .Lsecondary_processor_go
> --
> 2.25.1
>
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