[PATCH 17/41] bsps/irq: bsp_interrupt_get_affinity()

Sebastian Huber sebastian.huber at embedded-brains.de
Mon Jul 12 12:49:39 UTC 2021


Return a status code for bsp_interrupt_get_affinity().

Update #3269.
---
 bsps/include/dev/irq/arm-gic-irq.h     | 2 +-
 bsps/powerpc/qoriq/include/bsp/irq.h   | 2 +-
 bsps/powerpc/qoriq/irq/irq.c           | 5 +++--
 bsps/powerpc/t32mppc/include/bsp/irq.h | 3 ++-
 bsps/riscv/griscv/include/bsp/irq.h    | 2 +-
 bsps/riscv/griscv/irq/irq.c            | 4 +++-
 bsps/riscv/riscv/include/bsp/irq.h     | 2 +-
 bsps/riscv/riscv/irq/irq.c             | 4 +++-
 bsps/shared/dev/irq/arm-gicv2.c        | 3 ++-
 bsps/shared/dev/irq/arm-gicv3.c        | 3 ++-
 bsps/shared/irq/irq-affinity.c         | 9 ++++++++-
 bsps/sparc/erc32/include/bsp/irq.h     | 3 ++-
 bsps/sparc/leon3/include/bsp/irq.h     | 2 +-
 bsps/sparc/leon3/start/eirq.c          | 3 ++-
 bsps/sparc/shared/irq/irq-shared.c     | 2 +-
 15 files changed, 33 insertions(+), 16 deletions(-)

diff --git a/bsps/include/dev/irq/arm-gic-irq.h b/bsps/include/dev/irq/arm-gic-irq.h
index 5ce9d54684..730d792ce4 100644
--- a/bsps/include/dev/irq/arm-gic-irq.h
+++ b/bsps/include/dev/irq/arm-gic-irq.h
@@ -74,7 +74,7 @@ void bsp_interrupt_set_affinity(
   const Processor_mask *affinity
 );
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 );
diff --git a/bsps/powerpc/qoriq/include/bsp/irq.h b/bsps/powerpc/qoriq/include/bsp/irq.h
index cf46832045..6618d54190 100644
--- a/bsps/powerpc/qoriq/include/bsp/irq.h
+++ b/bsps/powerpc/qoriq/include/bsp/irq.h
@@ -385,7 +385,7 @@ void bsp_interrupt_set_affinity(
   const Processor_mask *affinity
 );
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 );
diff --git a/bsps/powerpc/qoriq/irq/irq.c b/bsps/powerpc/qoriq/irq/irq.c
index f1b50a7dd8..9ca903496c 100644
--- a/bsps/powerpc/qoriq/irq/irq.c
+++ b/bsps/powerpc/qoriq/irq/irq.c
@@ -64,7 +64,7 @@ void bsp_interrupt_set_affinity(
 	rtems_interrupt_lock_release(&lock, &lock_context);
 }
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
 	rtems_vector_number vector,
 	Processor_mask *affinity
 )
@@ -75,6 +75,7 @@ void bsp_interrupt_get_affinity(
 
 	ev_int_get_config(vector, &config, &priority, &destination);
 	_Processor_mask_From_uint32_t(affinity, destination, 0);
+	return RTEMS_SUCCESSFUL;
 }
 
 rtems_status_code bsp_interrupt_get_attributes(
@@ -323,7 +324,7 @@ void bsp_interrupt_set_affinity(
 	src_cfg->dr = _Processor_mask_To_uint32_t(affinity, 0);
 }
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
 	rtems_vector_number vector,
 	Processor_mask *affinity
 )
diff --git a/bsps/powerpc/t32mppc/include/bsp/irq.h b/bsps/powerpc/t32mppc/include/bsp/irq.h
index 998eadf3df..c0c374edae 100644
--- a/bsps/powerpc/t32mppc/include/bsp/irq.h
+++ b/bsps/powerpc/t32mppc/include/bsp/irq.h
@@ -35,13 +35,14 @@ RTEMS_INLINE_ROUTINE void bsp_interrupt_set_affinity(
   (void) affinity;
 }
 
-RTEMS_INLINE_ROUTINE void bsp_interrupt_get_affinity(
+RTEMS_INLINE_ROUTINE rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number  vector,
   Processor_mask      *affinity
 )
 {
   (void) vector;
   _Processor_mask_From_index( affinity, 0 );
+  return RTEMS_SUCCESSFUL;
 }
 
 #ifdef __cplusplus
diff --git a/bsps/riscv/griscv/include/bsp/irq.h b/bsps/riscv/griscv/include/bsp/irq.h
index f9e280d5a9..1df7b4b584 100644
--- a/bsps/riscv/griscv/include/bsp/irq.h
+++ b/bsps/riscv/griscv/include/bsp/irq.h
@@ -61,7 +61,7 @@ void bsp_interrupt_set_affinity(
   const Processor_mask *affinity
 );
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 );
diff --git a/bsps/riscv/griscv/irq/irq.c b/bsps/riscv/griscv/irq/irq.c
index f5b493bd02..1128678d3b 100644
--- a/bsps/riscv/griscv/irq/irq.c
+++ b/bsps/riscv/griscv/irq/irq.c
@@ -156,7 +156,7 @@ rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
   return RTEMS_SUCCESSFUL;
 }
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 )
@@ -171,6 +171,8 @@ void bsp_interrupt_get_affinity(
       _Processor_mask_Set(affinity, cpu_index);
     }
   }
+
+  return RTEMS_SUCCESSFUL;
 }
 
 void bsp_interrupt_set_affinity(
diff --git a/bsps/riscv/riscv/include/bsp/irq.h b/bsps/riscv/riscv/include/bsp/irq.h
index 306988d5e3..03fe8ced3a 100644
--- a/bsps/riscv/riscv/include/bsp/irq.h
+++ b/bsps/riscv/riscv/include/bsp/irq.h
@@ -61,7 +61,7 @@ void bsp_interrupt_set_affinity(
   const Processor_mask *affinity
 );
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 );
diff --git a/bsps/riscv/riscv/irq/irq.c b/bsps/riscv/riscv/irq/irq.c
index 52b14ee9e6..555365b2aa 100644
--- a/bsps/riscv/riscv/irq/irq.c
+++ b/bsps/riscv/riscv/irq/irq.c
@@ -399,7 +399,7 @@ void bsp_interrupt_set_affinity(
   }
 }
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 )
@@ -433,4 +433,6 @@ void bsp_interrupt_get_affinity(
       _Processor_mask_Assign(affinity, _SMP_Get_online_processors());
     }
   }
+
+  return RTEMS_SUCCESSFUL;
 }
diff --git a/bsps/shared/dev/irq/arm-gicv2.c b/bsps/shared/dev/irq/arm-gicv2.c
index fd7ca49458..ffc65ab672 100644
--- a/bsps/shared/dev/irq/arm-gicv2.c
+++ b/bsps/shared/dev/irq/arm-gicv2.c
@@ -303,7 +303,7 @@ void bsp_interrupt_set_affinity(
   gic_id_set_targets(dist, vector, targets);
 }
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 )
@@ -312,6 +312,7 @@ void bsp_interrupt_get_affinity(
   uint8_t targets = gic_id_get_targets(dist, vector);
 
   _Processor_mask_From_uint32_t(affinity, targets, 0);
+  return RTEMS_SUCCESSFUL;
 }
 
 void arm_gic_trigger_sgi(rtems_vector_number vector, uint32_t targets)
diff --git a/bsps/shared/dev/irq/arm-gicv3.c b/bsps/shared/dev/irq/arm-gicv3.c
index 12e0aa3534..fc76209298 100644
--- a/bsps/shared/dev/irq/arm-gicv3.c
+++ b/bsps/shared/dev/irq/arm-gicv3.c
@@ -410,7 +410,7 @@ void bsp_interrupt_set_affinity(
   gic_id_set_targets(dist, vector, targets);
 }
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 )
@@ -419,6 +419,7 @@ void bsp_interrupt_get_affinity(
   uint8_t targets = gic_id_get_targets(dist, vector);
 
   _Processor_mask_From_uint32_t(affinity, targets, 0);
+  return RTEMS_SUCCESSFUL;
 }
 
 void arm_gic_trigger_sgi(rtems_vector_number vector, uint32_t targets)
diff --git a/bsps/shared/irq/irq-affinity.c b/bsps/shared/irq/irq-affinity.c
index d2214cf6ec..34ebd8c354 100644
--- a/bsps/shared/irq/irq-affinity.c
+++ b/bsps/shared/irq/irq-affinity.c
@@ -74,6 +74,9 @@ rtems_status_code rtems_interrupt_get_affinity(
 {
   Processor_mask             set;
   Processor_mask_Copy_status status;
+#if defined(RTEMS_SMP)
+  rtems_status_code          sc;
+#endif
 
   if ( affinity == NULL ) {
     return RTEMS_INVALID_ADDRESS;
@@ -84,7 +87,11 @@ rtems_status_code rtems_interrupt_get_affinity(
   }
 
 #if defined(RTEMS_SMP)
-  bsp_interrupt_get_affinity(vector, &set);
+  sc = bsp_interrupt_get_affinity( vector, &set );
+
+  if ( sc != RTEMS_SUCCESSFUL ) {
+    return sc;
+  }
 #else
   _Processor_mask_From_index(&set, 0);
 #endif
diff --git a/bsps/sparc/erc32/include/bsp/irq.h b/bsps/sparc/erc32/include/bsp/irq.h
index 9e0f511b55..17ab3c09f0 100644
--- a/bsps/sparc/erc32/include/bsp/irq.h
+++ b/bsps/sparc/erc32/include/bsp/irq.h
@@ -35,13 +35,14 @@ RTEMS_INLINE_ROUTINE void bsp_interrupt_set_affinity(
   (void) affinity;
 }
 
-RTEMS_INLINE_ROUTINE void bsp_interrupt_get_affinity(
+RTEMS_INLINE_ROUTINE rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number  vector,
   Processor_mask      *affinity
 )
 {
   (void) vector;
   _Processor_mask_From_index( affinity, 0 );
+  return RTEMS_SUCCESSFUL;
 }
 
 #endif /* LIBBSP_ERC32_IRQ_CONFIG_H */
diff --git a/bsps/sparc/leon3/include/bsp/irq.h b/bsps/sparc/leon3/include/bsp/irq.h
index 5a53246a6b..baf97815e3 100644
--- a/bsps/sparc/leon3/include/bsp/irq.h
+++ b/bsps/sparc/leon3/include/bsp/irq.h
@@ -34,7 +34,7 @@ void bsp_interrupt_set_affinity(
   const Processor_mask *affinity
 );
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 );
diff --git a/bsps/sparc/leon3/start/eirq.c b/bsps/sparc/leon3/start/eirq.c
index 822b49959a..dcfaf5b3db 100644
--- a/bsps/sparc/leon3/start/eirq.c
+++ b/bsps/sparc/leon3/start/eirq.c
@@ -226,11 +226,12 @@ void bsp_interrupt_set_affinity(
   LEON3_IRQCTRL_RELEASE(&lock_context);
 }
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 )
 {
   *affinity = leon3_interrupt_affinities[vector];
+  return RTEMS_SUCCESSFUL;
 }
 #endif
diff --git a/bsps/sparc/shared/irq/irq-shared.c b/bsps/sparc/shared/irq/irq-shared.c
index 976c9256cc..aa1d412be0 100644
--- a/bsps/sparc/shared/irq/irq-shared.c
+++ b/bsps/sparc/shared/irq/irq-shared.c
@@ -16,7 +16,7 @@ static inline int bsp_irq_cpu(int irq)
 #if defined(RTEMS_SMP)
   Processor_mask affinity;
 
-  bsp_interrupt_get_affinity((rtems_vector_number) irq, &affinity);
+  (void) bsp_interrupt_get_affinity((rtems_vector_number) irq, &affinity);
   return (int) _Processor_mask_Find_last_set(&affinity);
 #elif defined(LEON3)
   return _LEON3_Get_current_processor();
-- 
2.26.2



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