[PATCH 18/41] bsps/irq: bsp_interrupt_set_affinity()
Sebastian Huber
sebastian.huber at embedded-brains.de
Mon Jul 12 12:49:40 UTC 2021
Return a status code for bsp_interrupt_set_affinity().
Update #3269.
---
bsps/include/dev/irq/arm-gic-irq.h | 2 +-
bsps/powerpc/qoriq/include/bsp/irq.h | 2 +-
bsps/powerpc/qoriq/irq/irq.c | 5 +++--
bsps/powerpc/t32mppc/include/bsp/irq.h | 3 ++-
bsps/riscv/griscv/include/bsp/irq.h | 2 +-
bsps/riscv/griscv/irq/irq.c | 4 +++-
bsps/riscv/riscv/include/bsp/irq.h | 2 +-
bsps/riscv/riscv/irq/irq.c | 8 +++++---
bsps/shared/dev/irq/arm-gicv2.c | 3 ++-
bsps/shared/dev/irq/arm-gicv3.c | 3 ++-
bsps/shared/irq/irq-affinity.c | 5 +++--
bsps/sparc/erc32/include/bsp/irq.h | 3 ++-
bsps/sparc/leon3/include/bsp/irq.h | 2 +-
bsps/sparc/leon3/start/eirq.c | 3 ++-
14 files changed, 29 insertions(+), 18 deletions(-)
diff --git a/bsps/include/dev/irq/arm-gic-irq.h b/bsps/include/dev/irq/arm-gic-irq.h
index 730d792ce4..68e0247fd8 100644
--- a/bsps/include/dev/irq/arm-gic-irq.h
+++ b/bsps/include/dev/irq/arm-gic-irq.h
@@ -69,7 +69,7 @@ rtems_status_code arm_gic_irq_get_group(
gic_group *group
);
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
);
diff --git a/bsps/powerpc/qoriq/include/bsp/irq.h b/bsps/powerpc/qoriq/include/bsp/irq.h
index 6618d54190..cd642fa00b 100644
--- a/bsps/powerpc/qoriq/include/bsp/irq.h
+++ b/bsps/powerpc/qoriq/include/bsp/irq.h
@@ -380,7 +380,7 @@ rtems_status_code qoriq_pic_set_priority(
int *old_priority
);
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
);
diff --git a/bsps/powerpc/qoriq/irq/irq.c b/bsps/powerpc/qoriq/irq/irq.c
index 9ca903496c..6856b5d39a 100644
--- a/bsps/powerpc/qoriq/irq/irq.c
+++ b/bsps/powerpc/qoriq/irq/irq.c
@@ -45,7 +45,7 @@ RTEMS_INTERRUPT_LOCK_DEFINE(static, lock, "QorIQ IRQ")
#ifdef QORIQ_IS_HYPERVISOR_GUEST
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
)
@@ -62,6 +62,7 @@ void bsp_interrupt_set_affinity(
ev_int_get_config(vector, &config, &priority, &destination);
ev_int_set_config(vector, config, priority, new_destination);
rtems_interrupt_lock_release(&lock, &lock_context);
+ return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_get_affinity(
@@ -314,7 +315,7 @@ rtems_status_code qoriq_pic_set_priority(
return sc;
}
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
)
diff --git a/bsps/powerpc/t32mppc/include/bsp/irq.h b/bsps/powerpc/t32mppc/include/bsp/irq.h
index c0c374edae..dc3f55b296 100644
--- a/bsps/powerpc/t32mppc/include/bsp/irq.h
+++ b/bsps/powerpc/t32mppc/include/bsp/irq.h
@@ -26,13 +26,14 @@ extern "C" {
#define BSP_INTERRUPT_VECTOR_COUNT 1
-RTEMS_INLINE_ROUTINE void bsp_interrupt_set_affinity(
+RTEMS_INLINE_ROUTINE rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
)
{
(void) vector;
(void) affinity;
+ return RTEMS_SUCCESSFUL;
}
RTEMS_INLINE_ROUTINE rtems_status_code bsp_interrupt_get_affinity(
diff --git a/bsps/riscv/griscv/include/bsp/irq.h b/bsps/riscv/griscv/include/bsp/irq.h
index 1df7b4b584..634fee4d01 100644
--- a/bsps/riscv/griscv/include/bsp/irq.h
+++ b/bsps/riscv/griscv/include/bsp/irq.h
@@ -56,7 +56,7 @@
#define BSP_INTERRUPT_VECTOR_COUNT RISCV_INTERRUPT_VECTOR_EXTERNAL(RISCV_MAXIMUM_EXTERNAL_INTERRUPTS)
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
);
diff --git a/bsps/riscv/griscv/irq/irq.c b/bsps/riscv/griscv/irq/irq.c
index 1128678d3b..123658f744 100644
--- a/bsps/riscv/griscv/irq/irq.c
+++ b/bsps/riscv/griscv/irq/irq.c
@@ -175,7 +175,7 @@ rtems_status_code bsp_interrupt_get_affinity(
return RTEMS_SUCCESSFUL;
}
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
)
@@ -196,4 +196,6 @@ void bsp_interrupt_set_affinity(
} else {
GRLIB_Disable_interrupt_broadcast(vector);
}
+
+ return RTEMS_SUCCESSFUL;
}
diff --git a/bsps/riscv/riscv/include/bsp/irq.h b/bsps/riscv/riscv/include/bsp/irq.h
index 03fe8ced3a..1b67c4e046 100644
--- a/bsps/riscv/riscv/include/bsp/irq.h
+++ b/bsps/riscv/riscv/include/bsp/irq.h
@@ -56,7 +56,7 @@
#define BSP_INTERRUPT_VECTOR_COUNT RISCV_INTERRUPT_VECTOR_EXTERNAL(RISCV_MAXIMUM_EXTERNAL_INTERRUPTS)
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
);
diff --git a/bsps/riscv/riscv/irq/irq.c b/bsps/riscv/riscv/irq/irq.c
index 555365b2aa..33ef9fbb35 100644
--- a/bsps/riscv/riscv/irq/irq.c
+++ b/bsps/riscv/riscv/irq/irq.c
@@ -367,7 +367,7 @@ rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
return RTEMS_SUCCESSFUL;
}
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
)
@@ -382,7 +382,7 @@ void bsp_interrupt_set_affinity(
if (_Processor_mask_Is_equal(&mask, _SMP_Get_online_processors())) {
riscv_plic_irq_to_cpu[interrupt_index - 1] = NULL;
- return;
+ return RTEMS_SUCCESSFUL;
}
if (_Processor_mask_Count(&mask) == 1) {
@@ -392,11 +392,13 @@ void bsp_interrupt_set_affinity(
cpu_index = _Processor_mask_Find_last_set(&mask) - 1;
cpu = _Per_CPU_Get_by_index(cpu_index);
riscv_plic_irq_to_cpu[interrupt_index - 1] = cpu->cpu_per_cpu.plic_m_ie;
- return;
+ return RTEMS_SUCCESSFUL;
}
bsp_fatal(RISCV_FATAL_INVALID_INTERRUPT_AFFINITY);
}
+
+ return RTEMS_UNSATISFIED;
}
rtems_status_code bsp_interrupt_get_affinity(
diff --git a/bsps/shared/dev/irq/arm-gicv2.c b/bsps/shared/dev/irq/arm-gicv2.c
index ffc65ab672..a1ba5e9112 100644
--- a/bsps/shared/dev/irq/arm-gicv2.c
+++ b/bsps/shared/dev/irq/arm-gicv2.c
@@ -292,7 +292,7 @@ rtems_status_code arm_gic_irq_get_group(
return sc;
}
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
)
@@ -301,6 +301,7 @@ void bsp_interrupt_set_affinity(
uint8_t targets = (uint8_t) _Processor_mask_To_uint32_t(affinity, 0);
gic_id_set_targets(dist, vector, targets);
+ return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_get_affinity(
diff --git a/bsps/shared/dev/irq/arm-gicv3.c b/bsps/shared/dev/irq/arm-gicv3.c
index fc76209298..8db3053ffd 100644
--- a/bsps/shared/dev/irq/arm-gicv3.c
+++ b/bsps/shared/dev/irq/arm-gicv3.c
@@ -399,7 +399,7 @@ rtems_status_code arm_gic_irq_get_priority(
return sc;
}
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
)
@@ -408,6 +408,7 @@ void bsp_interrupt_set_affinity(
uint8_t targets = (uint8_t) _Processor_mask_To_uint32_t(affinity, 0);
gic_id_set_targets(dist, vector, targets);
+ return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_get_affinity(
diff --git a/bsps/shared/irq/irq-affinity.c b/bsps/shared/irq/irq-affinity.c
index 34ebd8c354..5ab0c153eb 100644
--- a/bsps/shared/irq/irq-affinity.c
+++ b/bsps/shared/irq/irq-affinity.c
@@ -61,9 +61,10 @@ rtems_status_code rtems_interrupt_set_affinity(
}
#if defined(RTEMS_SMP)
- bsp_interrupt_set_affinity(vector, &set);
-#endif
+ return bsp_interrupt_set_affinity(vector, &set);
+#else
return RTEMS_SUCCESSFUL;
+#endif
}
rtems_status_code rtems_interrupt_get_affinity(
diff --git a/bsps/sparc/erc32/include/bsp/irq.h b/bsps/sparc/erc32/include/bsp/irq.h
index 17ab3c09f0..a61f51d6b6 100644
--- a/bsps/sparc/erc32/include/bsp/irq.h
+++ b/bsps/sparc/erc32/include/bsp/irq.h
@@ -26,13 +26,14 @@
/* No extra check is needed */
#undef BSP_INTERRUPT_CUSTOM_VALID_VECTOR
-RTEMS_INLINE_ROUTINE void bsp_interrupt_set_affinity(
+RTEMS_INLINE_ROUTINE rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
)
{
(void) vector;
(void) affinity;
+ return RTEMS_SUCCESSFUL;
}
RTEMS_INLINE_ROUTINE rtems_status_code bsp_interrupt_get_affinity(
diff --git a/bsps/sparc/leon3/include/bsp/irq.h b/bsps/sparc/leon3/include/bsp/irq.h
index baf97815e3..967086f8eb 100644
--- a/bsps/sparc/leon3/include/bsp/irq.h
+++ b/bsps/sparc/leon3/include/bsp/irq.h
@@ -29,7 +29,7 @@
/* The check is different depending on IRQ controller, runtime detected */
#define BSP_INTERRUPT_CUSTOM_VALID_VECTOR
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
);
diff --git a/bsps/sparc/leon3/start/eirq.c b/bsps/sparc/leon3/start/eirq.c
index dcfaf5b3db..d6373bf00a 100644
--- a/bsps/sparc/leon3/start/eirq.c
+++ b/bsps/sparc/leon3/start/eirq.c
@@ -196,7 +196,7 @@ rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
}
#if defined(RTEMS_SMP)
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
)
@@ -224,6 +224,7 @@ void bsp_interrupt_set_affinity(
}
LEON3_IRQCTRL_RELEASE(&lock_context);
+ return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_get_affinity(
--
2.26.2
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