[PATCH rtems 2/2] bsps/imxrt: Simplify linkcmds and make it flexible
Christian Mauderer
christian.mauderer at embedded-brains.de
Fri Jun 4 07:48:07 UTC 2021
Calling the memory FLASH and EXTRAM instead of FLEXSPI and SDRAM makes
it simpler to support other types of external RAM. This patch also
removes some of the calculations and improves names and documentation to
avoid pitfalls. It removes a unnecessary memory definition.
Update #4180
---
bsps/arm/imxrt/include/imxrt/memory.h | 34 ++++++--------
bsps/arm/imxrt/start/flash-boot-data.c | 4 +-
...{flash-config.c => flash-flexspi-config.c} | 2 +-
bsps/arm/imxrt/start/linkcmds.flexspi | 38 +++++++--------
bsps/arm/imxrt/start/linkcmds.sdram | 34 +++++++-------
bsps/arm/imxrt/start/mpu-config.c | 12 ++---
spec/build/bsps/arm/imxrt/bspimxrt.yml | 20 ++++----
spec/build/bsps/arm/imxrt/linkcmdsmemory.yml | 47 +++++++++----------
...ocachesz.yml => optmemextramnocachesz.yml} | 5 +-
...emsdrambase.yml => optmemextramorigin.yml} | 5 +-
spec/build/bsps/arm/imxrt/optmemextramsz.yml | 19 ++++++++
...ptmemsdramsz.yml => optmemflashorigin.yml} | 9 ++--
spec/build/bsps/arm/imxrt/optmemflashsz.yml | 20 ++++++++
spec/build/bsps/arm/imxrt/optmemflexspisz.yml | 17 -------
spec/build/bsps/arm/imxrt/optmemitcmsz.yml | 7 +--
spec/build/bsps/arm/imxrt/optmemnullsz.yml | 5 +-
.../bsps/arm/imxrt/optmemocramnocachesz.yml | 3 +-
spec/build/bsps/arm/imxrt/optmemocramsz.yml | 6 ++-
18 files changed, 156 insertions(+), 131 deletions(-)
rename bsps/arm/imxrt/start/{flash-config.c => flash-flexspi-config.c} (98%)
rename spec/build/bsps/arm/imxrt/{optmemsdramnocachesz.yml => optmemextramnocachesz.yml} (66%)
rename spec/build/bsps/arm/imxrt/{optmemsdrambase.yml => optmemextramorigin.yml} (65%)
create mode 100644 spec/build/bsps/arm/imxrt/optmemextramsz.yml
rename spec/build/bsps/arm/imxrt/{optmemsdramsz.yml => optmemflashorigin.yml} (53%)
create mode 100644 spec/build/bsps/arm/imxrt/optmemflashsz.yml
delete mode 100644 spec/build/bsps/arm/imxrt/optmemflexspisz.yml
diff --git a/bsps/arm/imxrt/include/imxrt/memory.h b/bsps/arm/imxrt/include/imxrt/memory.h
index 8185f713cc..47bb10f41e 100644
--- a/bsps/arm/imxrt/include/imxrt/memory.h
+++ b/bsps/arm/imxrt/include/imxrt/memory.h
@@ -56,29 +56,25 @@ extern char imxrt_memory_peripheral_begin[];
extern char imxrt_memory_peripheral_end[];
extern char imxrt_memory_peripheral_size[];
-extern char imxrt_memory_flexspi_config_begin[];
-extern char imxrt_memory_flexspi_config_end[];
-extern char imxrt_memory_flexspi_config_size[];
+extern char imxrt_memory_flash_config_begin[];
+extern char imxrt_memory_flash_config_end[];
+extern char imxrt_memory_flash_config_size[];
-extern char imxrt_memory_flexspi_ivt_begin[];
-extern char imxrt_memory_flexspi_ivt_end[];
-extern char imxrt_memory_flexspi_ivt_size[];
+extern char imxrt_memory_flash_ivt_begin[];
+extern char imxrt_memory_flash_ivt_end[];
+extern char imxrt_memory_flash_ivt_size[];
-extern char imxrt_memory_flexspi_begin[];
-extern char imxrt_memory_flexspi_end[];
-extern char imxrt_memory_flexspi_size[];
+extern char imxrt_memory_flash_begin[];
+extern char imxrt_memory_flash_end[];
+extern char imxrt_memory_flash_size[];
-extern char imxrt_memory_flexspi_fifo_begin[];
-extern char imxrt_memory_flexspi_fifo_end[];
-extern char imxrt_memory_flexspi_fifo_size[];
+extern char imxrt_memory_extram_begin[];
+extern char imxrt_memory_extram_end[];
+extern char imxrt_memory_extram_size[];
-extern char imxrt_memory_sdram_begin[];
-extern char imxrt_memory_sdram_end[];
-extern char imxrt_memory_sdram_size[];
-
-extern char imxrt_memory_sdram_nocache_begin[];
-extern char imxrt_memory_sdram_nocache_end[];
-extern char imxrt_memory_sdram_nocache_size[];
+extern char imxrt_memory_extram_nocache_begin[];
+extern char imxrt_memory_extram_nocache_end[];
+extern char imxrt_memory_extram_nocache_size[];
#ifdef __cplusplus
}
diff --git a/bsps/arm/imxrt/start/flash-boot-data.c b/bsps/arm/imxrt/start/flash-boot-data.c
index cf0430af72..a1877f4d26 100644
--- a/bsps/arm/imxrt/start/flash-boot-data.c
+++ b/bsps/arm/imxrt/start/flash-boot-data.c
@@ -30,8 +30,8 @@
#include <bspopts.h>
const BOOT_DATA_T imxrt_boot_data = {
- .start = (uint32_t) imxrt_memory_flexspi_config_begin,
- .size = IMXRT_MEMORY_FLEXSPI_FLASH_SIZE,
+ .start = (uint32_t) imxrt_memory_flash_config_begin,
+ .size = IMXRT_MEMORY_FLASH_SIZE,
.plugin = PLUGIN_FLAG,
.placeholder = 0xFFFFFFFF,
};
diff --git a/bsps/arm/imxrt/start/flash-config.c b/bsps/arm/imxrt/start/flash-flexspi-config.c
similarity index 98%
rename from bsps/arm/imxrt/start/flash-config.c
rename to bsps/arm/imxrt/start/flash-flexspi-config.c
index 07324f1330..50eca19b20 100644
--- a/bsps/arm/imxrt/start/flash-config.c
+++ b/bsps/arm/imxrt/start/flash-flexspi-config.c
@@ -43,7 +43,7 @@ const flexspi_nor_config_t imxrt_flexspi_config = {
.deviceType = kFlexSpiDeviceType_SerialRAM,
.sflashPadType = kSerialFlash_8Pads,
.serialClkFreq = kFlexSpiSerialClk_133MHz,
- .sflashA1Size = IMXRT_MEMORY_FLEXSPI_FLASH_SIZE,
+ .sflashA1Size = IMXRT_MEMORY_FLASH_SIZE,
.dataValidTime = {16u, 16u},
.lookupTable = {
FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
diff --git a/bsps/arm/imxrt/start/linkcmds.flexspi b/bsps/arm/imxrt/start/linkcmds.flexspi
index 4196bb33e5..ceed164894 100644
--- a/bsps/arm/imxrt/start/linkcmds.flexspi
+++ b/bsps/arm/imxrt/start/linkcmds.flexspi
@@ -1,22 +1,22 @@
INCLUDE linkcmds.memory
-REGION_ALIAS ("REGION_START", FLEXSPI);
-REGION_ALIAS ("REGION_VECTOR", FLEXSPI);
-REGION_ALIAS ("REGION_TEXT", FLEXSPI);
-REGION_ALIAS ("REGION_TEXT_LOAD", FLEXSPI);
-REGION_ALIAS ("REGION_RODATA", FLEXSPI);
-REGION_ALIAS ("REGION_RODATA_LOAD", FLEXSPI);
-REGION_ALIAS ("REGION_DATA", SDRAM);
-REGION_ALIAS ("REGION_DATA_LOAD", FLEXSPI);
-REGION_ALIAS ("REGION_FAST_TEXT", FLEXSPI);
-REGION_ALIAS ("REGION_FAST_TEXT_LOAD", FLEXSPI);
-REGION_ALIAS ("REGION_FAST_DATA", SDRAM);
-REGION_ALIAS ("REGION_FAST_DATA_LOAD", FLEXSPI);
-REGION_ALIAS ("REGION_BSS", SDRAM);
-REGION_ALIAS ("REGION_WORK", SDRAM);
-REGION_ALIAS ("REGION_STACK", SDRAM);
-REGION_ALIAS ("REGION_NOCACHE", SDRAM_NOCACHE);
-REGION_ALIAS ("REGION_NOCACHE_LOAD", FLEXSPI);
+REGION_ALIAS ("REGION_START", FLASH);
+REGION_ALIAS ("REGION_VECTOR", FLASH);
+REGION_ALIAS ("REGION_TEXT", FLASH);
+REGION_ALIAS ("REGION_TEXT_LOAD", FLASH);
+REGION_ALIAS ("REGION_RODATA", FLASH);
+REGION_ALIAS ("REGION_RODATA_LOAD", FLASH);
+REGION_ALIAS ("REGION_DATA", EXTRAM);
+REGION_ALIAS ("REGION_DATA_LOAD", FLASH);
+REGION_ALIAS ("REGION_FAST_TEXT", FLASH);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", FLASH);
+REGION_ALIAS ("REGION_FAST_DATA", EXTRAM);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", FLASH);
+REGION_ALIAS ("REGION_BSS", EXTRAM);
+REGION_ALIAS ("REGION_WORK", EXTRAM);
+REGION_ALIAS ("REGION_STACK", EXTRAM);
+REGION_ALIAS ("REGION_NOCACHE", EXTRAM_NOCACHE);
+REGION_ALIAS ("REGION_NOCACHE_LOAD", FLASH);
bsp_vector_table_in_start_section = 1;
@@ -24,12 +24,12 @@ SECTIONS {
. = imxrt_memory_flexspi_begin;
.flash_config : ALIGN_WITH_INPUT {
KEEP(*(.boot_hdr.conf))
- } > FLEXSPI_CONFIG AT > FLEXSPI_CONFIG
+ } > FLASH_CONFIG AT > FLASH_CONFIG
.flash_ivt : ALIGN_WITH_INPUT {
KEEP(*(.boot_hdr.ivt))
KEEP(*(.boot_hdr.boot_data))
KEEP(*(.boot_hdr.dcd_data))
- } > FLEXSPI_IVT AT > FLEXSPI_IVT
+ } > FLASH_IVT AT > FLASH_IVT
}
INCLUDE linkcmds.armv7m
diff --git a/bsps/arm/imxrt/start/linkcmds.sdram b/bsps/arm/imxrt/start/linkcmds.sdram
index 87d1dffa53..b1b90e32d6 100644
--- a/bsps/arm/imxrt/start/linkcmds.sdram
+++ b/bsps/arm/imxrt/start/linkcmds.sdram
@@ -1,22 +1,22 @@
INCLUDE linkcmds.memory
-REGION_ALIAS ("REGION_START", SDRAM);
-REGION_ALIAS ("REGION_VECTOR", SDRAM);
-REGION_ALIAS ("REGION_TEXT", SDRAM);
-REGION_ALIAS ("REGION_TEXT_LOAD", SDRAM);
-REGION_ALIAS ("REGION_RODATA", SDRAM);
-REGION_ALIAS ("REGION_RODATA_LOAD", SDRAM);
-REGION_ALIAS ("REGION_DATA", SDRAM);
-REGION_ALIAS ("REGION_DATA_LOAD", SDRAM);
-REGION_ALIAS ("REGION_FAST_TEXT", SDRAM);
-REGION_ALIAS ("REGION_FAST_TEXT_LOAD", SDRAM);
-REGION_ALIAS ("REGION_FAST_DATA", SDRAM);
-REGION_ALIAS ("REGION_FAST_DATA_LOAD", SDRAM);
-REGION_ALIAS ("REGION_BSS", SDRAM);
-REGION_ALIAS ("REGION_WORK", SDRAM);
-REGION_ALIAS ("REGION_STACK", SDRAM);
-REGION_ALIAS ("REGION_NOCACHE", SDRAM_NOCACHE);
-REGION_ALIAS ("REGION_NOCACHE_LOAD", SDRAM);
+REGION_ALIAS ("REGION_START", EXTRAM);
+REGION_ALIAS ("REGION_VECTOR", EXTRAM);
+REGION_ALIAS ("REGION_TEXT", EXTRAM);
+REGION_ALIAS ("REGION_TEXT_LOAD", EXTRAM);
+REGION_ALIAS ("REGION_RODATA", EXTRAM);
+REGION_ALIAS ("REGION_RODATA_LOAD", EXTRAM);
+REGION_ALIAS ("REGION_DATA", EXTRAM);
+REGION_ALIAS ("REGION_DATA_LOAD", EXTRAM);
+REGION_ALIAS ("REGION_FAST_TEXT", EXTRAM);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", EXTRAM);
+REGION_ALIAS ("REGION_FAST_DATA", EXTRAM);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", EXTRAM);
+REGION_ALIAS ("REGION_BSS", EXTRAM);
+REGION_ALIAS ("REGION_WORK", EXTRAM);
+REGION_ALIAS ("REGION_STACK", EXTRAM);
+REGION_ALIAS ("REGION_NOCACHE", EXTRAM_NOCACHE);
+REGION_ALIAS ("REGION_NOCACHE_LOAD", EXTRAM);
bsp_vector_table_in_start_section = 1;
diff --git a/bsps/arm/imxrt/start/mpu-config.c b/bsps/arm/imxrt/start/mpu-config.c
index 683b26d45b..79800ac431 100644
--- a/bsps/arm/imxrt/start/mpu-config.c
+++ b/bsps/arm/imxrt/start/mpu-config.c
@@ -32,8 +32,8 @@
BSP_START_DATA_SECTION const ARMV7M_MPU_Region_config
imxrt_config_mpu_region [] = {
{
- .begin = imxrt_memory_sdram_begin,
- .end = imxrt_memory_sdram_end,
+ .begin = imxrt_memory_extram_begin,
+ .end = imxrt_memory_extram_end,
.rasr = ARMV7M_MPU_RASR_AP(0x3)
| ARMV7M_MPU_RASR_TEX(0x1) | ARMV7M_MPU_RASR_C | ARMV7M_MPU_RASR_B
| ARMV7M_MPU_RASR_ENABLE,
@@ -44,14 +44,14 @@ BSP_START_DATA_SECTION const ARMV7M_MPU_Region_config
| ARMV7M_MPU_RASR_TEX(0x1) | ARMV7M_MPU_RASR_C | ARMV7M_MPU_RASR_B
| ARMV7M_MPU_RASR_ENABLE,
}, {
- .begin = imxrt_memory_flexspi_config_begin,
- .end = imxrt_memory_flexspi_end,
+ .begin = imxrt_memory_flash_config_begin,
+ .end = imxrt_memory_flash_end,
.rasr = ARMV7M_MPU_RASR_AP(0x3)
| ARMV7M_MPU_RASR_TEX(0x1) | ARMV7M_MPU_RASR_C | ARMV7M_MPU_RASR_B
| ARMV7M_MPU_RASR_ENABLE,
}, {
- .begin = imxrt_memory_sdram_nocache_begin,
- .end = imxrt_memory_sdram_nocache_end,
+ .begin = imxrt_memory_extram_nocache_begin,
+ .end = imxrt_memory_extram_nocache_end,
.rasr = ARMV7M_MPU_RASR_AP(0x3)
| ARMV7M_MPU_RASR_TEX(0x2)
| ARMV7M_MPU_RASR_ENABLE,
diff --git a/spec/build/bsps/arm/imxrt/bspimxrt.yml b/spec/build/bsps/arm/imxrt/bspimxrt.yml
index c6ea904754..30d690e0e2 100644
--- a/spec/build/bsps/arm/imxrt/bspimxrt.yml
+++ b/spec/build/bsps/arm/imxrt/bspimxrt.yml
@@ -126,26 +126,28 @@ links:
uid: optlinkcmds
- role: build-dependency
uid: optmemdtcmsz
+- role: build-dependency
+ uid: optmemextramnocachesz
+- role: build-dependency
+ uid: optmemextramorigin
+- role: build-dependency
+ uid: optmemextramsz
- role: build-dependency
uid: optmemflashcfgsz
- role: build-dependency
uid: optmemflashivtsz
- role: build-dependency
- uid: optmemflexspisz
+ uid: optmemflashorigin
+- role: build-dependency
+ uid: optmemflashsz
- role: build-dependency
uid: optmemitcmsz
- role: build-dependency
uid: optmemnullsz
-- role: build-dependency
- uid: optmemocramsz
- role: build-dependency
uid: optmemocramnocachesz
- role: build-dependency
- uid: optmemsdrambase
-- role: build-dependency
- uid: optmemsdramsz
-- role: build-dependency
- uid: optmemsdramnocachesz
+ uid: optmemocramsz
- role: build-dependency
uid: ../start
- role: build-dependency
@@ -240,8 +242,8 @@ source:
- bsps/arm/imxrt/start/bspstarthooks.c
- bsps/arm/imxrt/start/clock-arm-pll-config.c
- bsps/arm/imxrt/start/flash-boot-data.c
-- bsps/arm/imxrt/start/flash-config.c
- bsps/arm/imxrt/start/flash-dcd.c
+- bsps/arm/imxrt/start/flash-flexspi-config.c
- bsps/arm/imxrt/start/flash-ivt.c
- bsps/arm/imxrt/start/imxrt-ffec-init.c
- bsps/arm/imxrt/start/mpu-config.c
diff --git a/spec/build/bsps/arm/imxrt/linkcmdsmemory.yml b/spec/build/bsps/arm/imxrt/linkcmdsmemory.yml
index 3f7885c589..6b4a36955a 100644
--- a/spec/build/bsps/arm/imxrt/linkcmdsmemory.yml
+++ b/spec/build/bsps/arm/imxrt/linkcmdsmemory.yml
@@ -2,17 +2,16 @@ build-type: config-file
content: |
MEMORY {
NULL : ORIGIN = 0x00000000, LENGTH = ${IMXRT_MEMORY_NULL_SIZE:#010x}
- ITCM : ORIGIN = ${IMXRT_MEMORY_NULL_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_ITCM_SIZE:#010x} - ${IMXRT_MEMORY_NULL_SIZE:#010x}
+ ITCM : ORIGIN = ${IMXRT_MEMORY_NULL_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_ITCM_SIZE:#010x}
DTCM : ORIGIN = 0x20000000, LENGTH = ${IMXRT_MEMORY_DTCM_SIZE:#010x}
OCRAM : ORIGIN = 0x20200000, LENGTH = ${IMXRT_MEMORY_OCRAM_SIZE:#010x} - ${IMXRT_MEMORY_OCRAM_NOCACHE_SIZE:#010x}
OCRAM_NOCACHE : ORIGIN = 0x20200000 + ${IMXRT_MEMORY_OCRAM_SIZE:#010x} - ${IMXRT_MEMORY_OCRAM_NOCACHE_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_OCRAM_NOCACHE_SIZE:#010x}
PERIPHERAL : ORIGIN = 0x40000000, LENGTH = 0x20000000
- FLEXSPI_CONFIG : ORIGIN = 0x60000000, LENGTH = ${IMXRT_MEMORY_FLASH_CFG_SIZE:#010x}
- FLEXSPI_IVT : ORIGIN = 0x60000000 + ${IMXRT_MEMORY_FLASH_CFG_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_FLASH_IVT_SIZE:#010x}
- FLEXSPI : ORIGIN = 0x60000000 + ${IMXRT_MEMORY_FLASH_CFG_SIZE:#010x} + ${IMXRT_MEMORY_FLASH_IVT_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_FLEXSPI_FLASH_SIZE:#010x} - ${IMXRT_MEMORY_FLASH_CFG_SIZE:#010x} - ${IMXRT_MEMORY_FLASH_IVT_SIZE:#010x}
- FLEXSPI_FIFO : ORIGIN = 0x7F800000, LENGTH = 8M
- SDRAM : ORIGIN = ${IMXRT_MEMORY_SDRAM_BASE:#010x}, LENGTH = ${IMXRT_MEMORY_SDRAM_SIZE:#010x} - ${IMXRT_MEMORY_SDRAM_NOCACHE_SIZE:#010x}
- SDRAM_NOCACHE : ORIGIN = ${IMXRT_MEMORY_SDRAM_BASE:#010x} + ${IMXRT_MEMORY_SDRAM_SIZE:#010x} - ${IMXRT_MEMORY_SDRAM_NOCACHE_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_SDRAM_NOCACHE_SIZE:#010x}
+ FLASH_CONFIG : ORIGIN = ${IMXRT_MEMORY_FLASH_ORIGIN:#010x}, LENGTH = ${IMXRT_MEMORY_FLASH_CFG_SIZE:#010x}
+ FLASH_IVT : ORIGIN = ${IMXRT_MEMORY_FLASH_ORIGIN:#010x} + ${IMXRT_MEMORY_FLASH_CFG_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_FLASH_IVT_SIZE:#010x}
+ FLASH : ORIGIN = ${IMXRT_MEMORY_FLASH_ORIGIN:#010x} + ${IMXRT_MEMORY_FLASH_CFG_SIZE:#010x} + ${IMXRT_MEMORY_FLASH_IVT_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_FLASH_SIZE:#010x} - ${IMXRT_MEMORY_FLASH_CFG_SIZE:#010x} - ${IMXRT_MEMORY_FLASH_IVT_SIZE:#010x}
+ EXTRAM : ORIGIN = ${IMXRT_MEMORY_EXTRAM_ORIGIN:#010x}, LENGTH = ${IMXRT_MEMORY_EXTRAM_SIZE:#010x} - ${IMXRT_MEMORY_EXTRAM_NOCACHE_SIZE:#010x}
+ EXTRAM_NOCACHE : ORIGIN = ${IMXRT_MEMORY_EXTRAM_ORIGIN:#010x} + ${IMXRT_MEMORY_EXTRAM_SIZE:#010x} - ${IMXRT_MEMORY_EXTRAM_NOCACHE_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_EXTRAM_NOCACHE_SIZE:#010x}
}
imxrt_memory_null_begin = ORIGIN (NULL);
@@ -39,29 +38,25 @@ content: |
imxrt_memory_peripheral_end = ORIGIN (PERIPHERAL) + LENGTH (PERIPHERAL);
imxrt_memory_peripheral_size = LENGTH (PERIPHERAL);
- imxrt_memory_flexspi_config_begin = ORIGIN (FLEXSPI_CONFIG);
- imxrt_memory_flexspi_config_end = ORIGIN (FLEXSPI_CONFIG) + LENGTH (FLEXSPI_CONFIG);
- imxrt_memory_flexspi_config_size = LENGTH (FLEXSPI_CONFIG);
+ imxrt_memory_flash_config_begin = ORIGIN (FLASH_CONFIG);
+ imxrt_memory_flash_config_end = ORIGIN (FLASH_CONFIG) + LENGTH (FLASH_CONFIG);
+ imxrt_memory_flash_config_size = LENGTH (FLASH_CONFIG);
- imxrt_memory_flexspi_ivt_begin = ORIGIN (FLEXSPI_IVT);
- imxrt_memory_flexspi_ivt_end = ORIGIN (FLEXSPI_IVT) + LENGTH (FLEXSPI_IVT);
- imxrt_memory_flexspi_ivt_size = LENGTH (FLEXSPI_IVT);
+ imxrt_memory_flash_ivt_begin = ORIGIN (FLASH_IVT);
+ imxrt_memory_flash_ivt_end = ORIGIN (FLASH_IVT) + LENGTH (FLASH_IVT);
+ imxrt_memory_flash_ivt_size = LENGTH (FLASH_IVT);
- imxrt_memory_flexspi_begin = ORIGIN (FLEXSPI);
- imxrt_memory_flexspi_end = ORIGIN (FLEXSPI) + LENGTH (FLEXSPI);
- imxrt_memory_flexspi_size = LENGTH (FLEXSPI);
+ imxrt_memory_flash_begin = ORIGIN (FLASH);
+ imxrt_memory_flash_end = ORIGIN (FLASH) + LENGTH (FLASH);
+ imxrt_memory_flash_size = LENGTH (FLASH);
- imxrt_memory_flexspi_fifo_begin = ORIGIN (FLEXSPI_FIFO);
- imxrt_memory_flexspi_fifo_end = ORIGIN (FLEXSPI_FIFO) + LENGTH (FLEXSPI_FIFO);
- imxrt_memory_flexspi_fifo_size = LENGTH (FLEXSPI_FIFO);
+ imxrt_memory_extram_begin = ORIGIN (EXTRAM);
+ imxrt_memory_extram_end = ORIGIN (EXTRAM) + LENGTH (EXTRAM);
+ imxrt_memory_extram_size = LENGTH (EXTRAM);
- imxrt_memory_sdram_begin = ORIGIN (SDRAM);
- imxrt_memory_sdram_end = ORIGIN (SDRAM) + LENGTH (SDRAM);
- imxrt_memory_sdram_size = LENGTH (SDRAM);
-
- imxrt_memory_sdram_nocache_begin = ORIGIN (SDRAM_NOCACHE);
- imxrt_memory_sdram_nocache_end = ORIGIN (SDRAM_NOCACHE) + LENGTH (SDRAM_NOCACHE);
- imxrt_memory_sdram_nocache_size = LENGTH (SDRAM_NOCACHE);
+ imxrt_memory_extram_nocache_begin = ORIGIN (EXTRAM_NOCACHE);
+ imxrt_memory_extram_nocache_end = ORIGIN (EXTRAM_NOCACHE) + LENGTH (EXTRAM_NOCACHE);
+ imxrt_memory_extram_nocache_size = LENGTH (EXTRAM_NOCACHE);
enabled-by: true
install-path: ${BSP_LIBDIR}
links: []
diff --git a/spec/build/bsps/arm/imxrt/optmemsdramnocachesz.yml b/spec/build/bsps/arm/imxrt/optmemextramnocachesz.yml
similarity index 66%
rename from spec/build/bsps/arm/imxrt/optmemsdramnocachesz.yml
rename to spec/build/bsps/arm/imxrt/optmemextramnocachesz.yml
index 113387d039..8b6dba859a 100644
--- a/spec/build/bsps/arm/imxrt/optmemsdramnocachesz.yml
+++ b/spec/build/bsps/arm/imxrt/optmemextramnocachesz.yml
@@ -7,9 +7,10 @@ default-by-variant: []
enabled-by: true
format: '{:#010x}'
links: []
-name: IMXRT_MEMORY_SDRAM_NOCACHE_SIZE
+name: IMXRT_MEMORY_EXTRAM_NOCACHE_SIZE
description: |
- Size of the nocache area at the end of the SDRAM in bytes.
+ Size of the nocache area at the end of the external RAM in bytes. Must not be
+ bigger than IMXRT_MEMORY_EXTRAM_SIZE.
type: build
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
copyrights:
diff --git a/spec/build/bsps/arm/imxrt/optmemsdrambase.yml b/spec/build/bsps/arm/imxrt/optmemextramorigin.yml
similarity index 65%
rename from spec/build/bsps/arm/imxrt/optmemsdrambase.yml
rename to spec/build/bsps/arm/imxrt/optmemextramorigin.yml
index 567ceab07c..98350d2e2f 100644
--- a/spec/build/bsps/arm/imxrt/optmemsdrambase.yml
+++ b/spec/build/bsps/arm/imxrt/optmemextramorigin.yml
@@ -7,9 +7,10 @@ default-by-variant: []
enabled-by: true
format: '{:#010x}'
links: []
-name: IMXRT_MEMORY_SDRAM_BASE
+name: IMXRT_MEMORY_EXTRAM_ORIGIN
description: |
- Base address of the SDRAM.
+ Base address of the external RAM. An external ram can be for example be a
+ SDRAM connected to SEMC or a HyperRAM connected to FlexSPI.
type: build
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
copyrights:
diff --git a/spec/build/bsps/arm/imxrt/optmemextramsz.yml b/spec/build/bsps/arm/imxrt/optmemextramsz.yml
new file mode 100644
index 0000000000..6999add5cc
--- /dev/null
+++ b/spec/build/bsps/arm/imxrt/optmemextramsz.yml
@@ -0,0 +1,19 @@
+actions:
+- get-integer: null
+- env-assign: null
+build-type: option
+default: 0x2000000
+default-by-variant: []
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: IMXRT_MEMORY_EXTRAM_SIZE
+description: |
+ Size of the external RAM in bytes. An external ram can be for example be a
+ SDRAM connected to SEMC or a HyperRAM connected to FlexSPI. The size has to
+ be at least big enough to hold the non cached section with size
+ IMXRT_MEMORY_EXTRAM_NOCACHE_SIZE at the end of the RAM.
+type: build
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
diff --git a/spec/build/bsps/arm/imxrt/optmemsdramsz.yml b/spec/build/bsps/arm/imxrt/optmemflashorigin.yml
similarity index 53%
rename from spec/build/bsps/arm/imxrt/optmemsdramsz.yml
rename to spec/build/bsps/arm/imxrt/optmemflashorigin.yml
index 315b5271dc..882ade680c 100644
--- a/spec/build/bsps/arm/imxrt/optmemsdramsz.yml
+++ b/spec/build/bsps/arm/imxrt/optmemflashorigin.yml
@@ -1,15 +1,18 @@
actions:
- get-integer: null
- env-assign: null
+- define-unquoted: IMXRT_MEMORY_FLASH_ORIGIN
build-type: option
-default: 33554432
+default: 0x60000000
default-by-variant: []
enabled-by: true
format: '{:#010x}'
links: []
-name: IMXRT_MEMORY_SDRAM_SIZE
+name: IMXRT_MEMORY_FLASH_ORIGIN
description: |
- Size of the SDRAM in bytes.
+ Origin of the external flash memory. That can be for example a flash
+ connected to FlexSPI or to SEMC. The default value is for a HyperFlash
+ connected to FlexSPI.
type: build
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
copyrights:
diff --git a/spec/build/bsps/arm/imxrt/optmemflashsz.yml b/spec/build/bsps/arm/imxrt/optmemflashsz.yml
new file mode 100644
index 0000000000..c474dd256e
--- /dev/null
+++ b/spec/build/bsps/arm/imxrt/optmemflashsz.yml
@@ -0,0 +1,20 @@
+actions:
+- get-integer: null
+- env-assign: null
+- define-unquoted: IMXRT_MEMORY_FLASH_SIZE
+build-type: option
+default: 0x4000000
+default-by-variant: []
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: IMXRT_MEMORY_FLASH_SIZE
+description: |
+ Size of the external flash area in bytes. Has to be big enough to hold the
+ i.MXRT initial vector table (IVT) and configuration information. The sizes of
+ these are defined with IMXRT_MEMORY_FLASH_IVT_SIZE and
+ IMXRT_MEMORY_FLASH_CFG_SIZE.
+type: build
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
diff --git a/spec/build/bsps/arm/imxrt/optmemflexspisz.yml b/spec/build/bsps/arm/imxrt/optmemflexspisz.yml
deleted file mode 100644
index 3750c2c683..0000000000
--- a/spec/build/bsps/arm/imxrt/optmemflexspisz.yml
+++ /dev/null
@@ -1,17 +0,0 @@
-actions:
-- get-integer: null
-- env-assign: null
-- define-unquoted: IMXRT_MEMORY_FLEXSPI_FLASH_SIZE
-build-type: option
-default: 67108864
-default-by-variant: []
-enabled-by: true
-format: '{:#010x}'
-links: []
-name: IMXRT_MEMORY_FLEXSPI_FLASH_SIZE
-description: |
- Size of the FlexSPI Flash area in bytes.
-type: build
-SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
-copyrights:
-- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
diff --git a/spec/build/bsps/arm/imxrt/optmemitcmsz.yml b/spec/build/bsps/arm/imxrt/optmemitcmsz.yml
index 195d519889..7795b2becb 100644
--- a/spec/build/bsps/arm/imxrt/optmemitcmsz.yml
+++ b/spec/build/bsps/arm/imxrt/optmemitcmsz.yml
@@ -2,15 +2,16 @@ actions:
- get-integer: null
- env-assign: null
build-type: option
-default: 0x20000
+default: 0x1ff00
default-by-variant: []
enabled-by: true
format: '{:#010x}'
links: []
name: IMXRT_MEMORY_ITCM_SIZE
description: |
- Size of the ITCM in bytes. Note that these sizes depend on fuses or software
- settings done by a bootloader (together with DTCM and OCRAM).
+ Size of the ITCM in bytes. Note that these sizes depend on fuses or software
+ settings done by a bootloader (together with DTCM and OCRAM). The ITCM size
+ has to take the IMXRT_MEMORY_NULL_SIZE into account!
type: build
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
copyrights:
diff --git a/spec/build/bsps/arm/imxrt/optmemnullsz.yml b/spec/build/bsps/arm/imxrt/optmemnullsz.yml
index a298f8192f..d737ef0e60 100644
--- a/spec/build/bsps/arm/imxrt/optmemnullsz.yml
+++ b/spec/build/bsps/arm/imxrt/optmemnullsz.yml
@@ -2,7 +2,7 @@ actions:
- get-integer: null
- env-assign: null
build-type: option
-default: 0x400
+default: 0x100
default-by-variant: []
enabled-by: true
format: '{:#010x}'
@@ -10,7 +10,8 @@ links: []
name: IMXRT_MEMORY_NULL_SIZE
description: |
Size of the NULL pointer protection area in bytes. This memory area reduces
- the size of the ITCM available to the application.
+ the size of the ITCM available to the application. If you adapt this, you
+ have to adapt IMXRT_MEMORY_ITCM_SIZE too.
type: build
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
copyrights:
diff --git a/spec/build/bsps/arm/imxrt/optmemocramnocachesz.yml b/spec/build/bsps/arm/imxrt/optmemocramnocachesz.yml
index 8e68a08708..942dd60de2 100644
--- a/spec/build/bsps/arm/imxrt/optmemocramnocachesz.yml
+++ b/spec/build/bsps/arm/imxrt/optmemocramnocachesz.yml
@@ -9,7 +9,8 @@ format: '{:#010x}'
links: []
name: IMXRT_MEMORY_OCRAM_NOCACHE_SIZE
description: |
- Size of the nocache area at the end of the OCRAM in bytes.
+ Size of the nocache area at the end of the OCRAM in bytes. Must not be bigger
+ than IMXRT_MEMORY_OCRAM_SIZE.
type: build
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
copyrights:
diff --git a/spec/build/bsps/arm/imxrt/optmemocramsz.yml b/spec/build/bsps/arm/imxrt/optmemocramsz.yml
index 4498435aa6..9e264f69be 100644
--- a/spec/build/bsps/arm/imxrt/optmemocramsz.yml
+++ b/spec/build/bsps/arm/imxrt/optmemocramsz.yml
@@ -9,8 +9,10 @@ format: '{:#010x}'
links: []
name: IMXRT_MEMORY_OCRAM_SIZE
description: |
- Size of the OCRAM in bytes. Note that these sizes depend on fuses or software
- settings done by a bootloader (together with ITCM and DTCM).
+ Size of the OCRAM in bytes. Note that these sizes depend on fuses or software
+ settings done by a bootloader (together with ITCM and DTCM). The size has to
+ be at least big enough to hold the non cached section with size
+ IMXRT_MEMORY_OCRAM_NOCACHE_SIZE at the end of the RAM.
type: build
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
copyrights:
--
2.26.2
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