[PATCH] aarch64: add qemu bsps for cortex-a72
Kinsey Moore
kinsey.moore at oarcorp.com
Wed Jun 9 02:36:54 UTC 2021
Looks good.
On 6/8/2021 15:32, Gedare Bloom wrote:
> The a72 BSPs are identical to the a53 BSPs just changing a53 to a72.
> ---
> bsps/aarch64/a72/console/console.c | 69 +++++++++++++++++
> bsps/aarch64/a72/include/bsp.h | 74 +++++++++++++++++++
> bsps/aarch64/a72/include/bsp/irq.h | 67 +++++++++++++++++
> bsps/aarch64/a72/include/tm27.h | 46 ++++++++++++
> bsps/aarch64/a72/start/bspstart.c | 49 ++++++++++++
> bsps/aarch64/a72/start/bspstarthooks.c | 50 +++++++++++++
> spec/build/bsps/aarch64/a72/abi.yml | 22 ++++++
> .../bsps/aarch64/a72/bspa72ilp32qemu.yml | 19 +++++
> .../build/bsps/aarch64/a72/bspa72lp64qemu.yml | 19 +++++
> spec/build/bsps/aarch64/a72/grp.yml | 42 +++++++++++
> .../build/bsps/aarch64/a72/linkcmds_ilp32.yml | 71 ++++++++++++++++++
> spec/build/bsps/aarch64/a72/linkcmds_lp64.yml | 71 ++++++++++++++++++
> spec/build/bsps/aarch64/a72/obj.yml | 37 ++++++++++
> spec/build/bsps/aarch64/a72/optloadoff.yml | 18 +++++
> spec/build/bsps/aarch64/a72/optnocachelen.yml | 18 +++++
> spec/build/bsps/aarch64/a72/optramlen.yml | 18 +++++
> spec/build/bsps/aarch64/a72/optramori.yml | 18 +++++
> spec/build/bsps/aarch64/a72/tsta72.yml | 41 ++++++++++
> 18 files changed, 749 insertions(+)
> create mode 100644 bsps/aarch64/a72/console/console.c
> create mode 100644 bsps/aarch64/a72/include/bsp.h
> create mode 100644 bsps/aarch64/a72/include/bsp/irq.h
> create mode 100644 bsps/aarch64/a72/include/tm27.h
> create mode 100644 bsps/aarch64/a72/start/bspstart.c
> create mode 100644 bsps/aarch64/a72/start/bspstarthooks.c
> create mode 100644 spec/build/bsps/aarch64/a72/abi.yml
> create mode 100644 spec/build/bsps/aarch64/a72/bspa72ilp32qemu.yml
> create mode 100644 spec/build/bsps/aarch64/a72/bspa72lp64qemu.yml
> create mode 100644 spec/build/bsps/aarch64/a72/grp.yml
> create mode 100644 spec/build/bsps/aarch64/a72/linkcmds_ilp32.yml
> create mode 100644 spec/build/bsps/aarch64/a72/linkcmds_lp64.yml
> create mode 100644 spec/build/bsps/aarch64/a72/obj.yml
> create mode 100644 spec/build/bsps/aarch64/a72/optloadoff.yml
> create mode 100644 spec/build/bsps/aarch64/a72/optnocachelen.yml
> create mode 100644 spec/build/bsps/aarch64/a72/optramlen.yml
> create mode 100644 spec/build/bsps/aarch64/a72/optramori.yml
> create mode 100644 spec/build/bsps/aarch64/a72/tsta72.yml
>
> diff --git a/bsps/aarch64/a72/console/console.c b/bsps/aarch64/a72/console/console.c
> new file mode 100644
> index 0000000000..08532d68cd
> --- /dev/null
> +++ b/bsps/aarch64/a72/console/console.c
> @@ -0,0 +1,69 @@
> +/* SPDX-License-Identifier: BSD-2-Clause */
> +
> +/**
> + * @file
> + *
> + * @ingroup RTEMSBSPsAArch64A72
> + *
> + * @brief Console Configuration
> + */
> +
> +/*
> + * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
> + * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +#include <rtems/bspIo.h>
> +
> +#include <bsp.h>
> +#include <dev/serial/arm-pl011.h>
> +#include <bsp/console-termios.h>
> +
> +#include <bspopts.h>
> +
> +arm_pl011_context a72_qemu_vpl011_context = {
> + .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("PL011"),
> + .regs = (volatile pl011 *) BSP_A72_QEMU_VPL011_BASE,
> + .initial_baud = 115200
> +};
> +
> +const console_device console_device_table[] = {
> + {
> + .device_file = "/dev/ttyS0",
> + .probe = console_device_probe_default,
> + .handler = &arm_pl011_fns,
> + .context = &a72_qemu_vpl011_context.base
> + }
> +};
> +
> +const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
> +
> +static void output_char( char c )
> +{
> + arm_pl011_write_polled(&a72_qemu_vpl011_context.base, c);
> +}
> +
> +BSP_output_char_function_type BSP_output_char = output_char;
> +
> +BSP_polling_getchar_function_type BSP_poll_char = NULL;
> diff --git a/bsps/aarch64/a72/include/bsp.h b/bsps/aarch64/a72/include/bsp.h
> new file mode 100644
> index 0000000000..7ae9bd8239
> --- /dev/null
> +++ b/bsps/aarch64/a72/include/bsp.h
> @@ -0,0 +1,74 @@
> +/* SPDX-License-Identifier: BSD-2-Clause */
> +
> +/**
> + * @file
> + *
> + * @ingroup RTEMSBSPsAArch64A72
> + *
> + * @brief Core BSP definitions
> + */
> +
> +/*
> + * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
> + * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +#ifndef LIBBSP_AARCH64_A72_QEMU_BSP_H
> +#define LIBBSP_AARCH64_A72_QEMU_BSP_H
> +
> +/**
> + * @addtogroup RTEMSBSPsAArch64
> + *
> + * @{
> + */
> +
> +#include <bspopts.h>
> +
> +#ifndef ASM
> +
> +#include <bsp/default-initial-extension.h>
> +#include <bsp/start.h>
> +
> +#include <rtems.h>
> +
> +#ifdef __cplusplus
> +extern "C" {
> +#endif /* __cplusplus */
> +
> +#define BSP_ARM_GIC_CPUIF_BASE 0x08010000
> +#define BSP_ARM_GIC_DIST_BASE 0x08000000
> +#define BSP_ARM_GIC_REDIST_BASE 0x080A0000
> +
> +#define BSP_A72_QEMU_VPL011_BASE 0x9000000
> +#define BSP_A72_QEMU_VPL011_LENGTH 0x1000
> +
> +#ifdef __cplusplus
> +}
> +#endif /* __cplusplus */
> +
> +#endif /* ASM */
> +
> +/** @} */
> +
> +#endif /* LIBBSP_AARCH64_A72_QEMU_BSP_H */
> diff --git a/bsps/aarch64/a72/include/bsp/irq.h b/bsps/aarch64/a72/include/bsp/irq.h
> new file mode 100644
> index 0000000000..c3de523d48
> --- /dev/null
> +++ b/bsps/aarch64/a72/include/bsp/irq.h
> @@ -0,0 +1,67 @@
> +/* SPDX-License-Identifier: BSD-2-Clause */
> +
> +/**
> + * @file
> + *
> + * @ingroup RTEMSBSPsAArch64A72
> + *
> + * @brief BSP IRQ definitions
> + */
> +
> +/*
> + * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
> + * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +#ifndef LIBBSP_AARCH64_A72_IRQ_H
> +#define LIBBSP_AARCH64_A72_IRQ_H
> +
> +#ifndef ASM
> +
> +#include <rtems/irq.h>
> +#include <rtems/irq-extension.h>
> +
> +#include <dev/irq/arm-gic-irq.h>
> +
> +#ifdef __cplusplus
> +extern "C" {
> +#endif /* __cplusplus */
> +
> +#define BSP_INTERRUPT_VECTOR_MIN 0
> +#define BSP_INTERRUPT_VECTOR_MAX 1023
> +
> +/* Interrupts vectors */
> +#define BSP_TIMER_VIRT_PPI 27
> +#define BSP_TIMER_PHYS_NS_PPI 30
> +#define BSP_VPL011_SPI 32
> +
> +/** @} */
> +
> +#ifdef __cplusplus
> +}
> +#endif /* __cplusplus */
> +
> +#endif /* ASM */
> +
> +#endif /* LIBBSP_AARCH64_A72_IRQ_H */
> diff --git a/bsps/aarch64/a72/include/tm27.h b/bsps/aarch64/a72/include/tm27.h
> new file mode 100644
> index 0000000000..f31396e8bd
> --- /dev/null
> +++ b/bsps/aarch64/a72/include/tm27.h
> @@ -0,0 +1,46 @@
> +/* SPDX-License-Identifier: BSD-2-Clause */
> +
> +/**
> + * @file
> + *
> + * @ingroup RTEMSBSPsAArch64A72
> + *
> + * @brief BSP tm27 header
> + */
> +
> +/*
> + * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
> + * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +#ifndef _RTEMS_TMTEST27
> +#error "This is an RTEMS internal file you must not include directly."
> +#endif
> +
> +#ifndef __tm27_h
> +#define __tm27_h
> +
> +#include <dev/irq/arm-gic-tm27.h>
> +
> +#endif /* __tm27_h */
> diff --git a/bsps/aarch64/a72/start/bspstart.c b/bsps/aarch64/a72/start/bspstart.c
> new file mode 100644
> index 0000000000..2a8a4ac8d8
> --- /dev/null
> +++ b/bsps/aarch64/a72/start/bspstart.c
> @@ -0,0 +1,49 @@
> +/* SPDX-License-Identifier: BSD-2-Clause */
> +
> +/**
> + * @file
> + *
> + * @ingroup RTEMSBSPsAArch64A53
> + *
> + * @brief BSP Startup
> + */
> +
> +/*
> + * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
> + * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +#include <bsp.h>
> +#include <bsp/bootcard.h>
> +#include <bsp/irq-generic.h>
> +#include <bsp/linker-symbols.h>
> +
> +void bsp_start( void )
> +{
> + bsp_interrupt_initialize();
> + rtems_cache_coherent_add_area(
> + bsp_section_nocacheheap_begin,
> + (uintptr_t) bsp_section_nocacheheap_size
> + );
> +}
> diff --git a/bsps/aarch64/a72/start/bspstarthooks.c b/bsps/aarch64/a72/start/bspstarthooks.c
> new file mode 100644
> index 0000000000..20d3bc6e70
> --- /dev/null
> +++ b/bsps/aarch64/a72/start/bspstarthooks.c
> @@ -0,0 +1,50 @@
> +/* SPDX-License-Identifier: BSD-2-Clause */
> +
> +/**
> + * @file
> + *
> + * @ingroup RTEMSBSPsAArch64A53
> + *
> + * @brief BSP Startup Hooks
> + */
> +
> +/*
> + * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
> + * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +#include <bsp.h>
> +#include <bsp/start.h>
> +
> +BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
> +{
> + /* Do nothing */
> +}
> +
> +BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
> +{
> + AArch64_start_set_vector_base();
> + bsp_start_copy_sections();
> + bsp_start_clear_bss();
> +}
> diff --git a/spec/build/bsps/aarch64/a72/abi.yml b/spec/build/bsps/aarch64/a72/abi.yml
> new file mode 100644
> index 0000000000..9b9438648c
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/a72/abi.yml
> @@ -0,0 +1,22 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +actions:
> +- get-string: null
> +- split: null
> +- env-append: null
> +build-type: option
> +copyrights:
> +- Copyright (C) 2020 On-Line Applications Research (OAR)
> +default:
> +- -mcpu=cortex-a72
> +default-by-variant:
> +- value:
> + - -mcpu=cortex-a72
> + - -mabi=ilp32
> + variants:
> + - aarch64/a72_ilp32_qemu
> +description: |
> + ABI flags
> +enabled-by: true
> +links: []
> +name: ABI_FLAGS
> +type: build
> diff --git a/spec/build/bsps/aarch64/a72/bspa72ilp32qemu.yml b/spec/build/bsps/aarch64/a72/bspa72ilp32qemu.yml
> new file mode 100644
> index 0000000000..2fe1857701
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/a72/bspa72ilp32qemu.yml
> @@ -0,0 +1,19 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +arch: aarch64
> +bsp: a72_ilp32_qemu
> +build-type: bsp
> +cflags: []
> +copyrights:
> +- Copyright (C) 2020 On-Line Applications Research (OAR)
> +cppflags: []
> +enabled-by: true
> +family: a72
> +includes: []
> +install: []
> +links:
> +- role: build-dependency
> + uid: grp
> +- role: build-dependency
> + uid: linkcmds_ilp32
> +source: []
> +type: build
> diff --git a/spec/build/bsps/aarch64/a72/bspa72lp64qemu.yml b/spec/build/bsps/aarch64/a72/bspa72lp64qemu.yml
> new file mode 100644
> index 0000000000..ccfca87d2e
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/a72/bspa72lp64qemu.yml
> @@ -0,0 +1,19 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +arch: aarch64
> +bsp: a72_lp64_qemu
> +build-type: bsp
> +cflags: []
> +copyrights:
> +- Copyright (C) 2020 On-Line Applications Research (OAR)
> +cppflags: []
> +enabled-by: true
> +family: a72
> +includes: []
> +install: []
> +links:
> +- role: build-dependency
> + uid: grp
> +- role: build-dependency
> + uid: linkcmds_lp64
> +source: []
> +type: build
> diff --git a/spec/build/bsps/aarch64/a72/grp.yml b/spec/build/bsps/aarch64/a72/grp.yml
> new file mode 100644
> index 0000000000..0f3e717a94
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/a72/grp.yml
> @@ -0,0 +1,42 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +build-type: group
> +copyrights:
> +- Copyright (C) 2020 On-Line Applications Research (OAR)
> +enabled-by: true
> +includes: []
> +install: []
> +ldflags: []
> +links:
> +- role: build-dependency
> + uid: ../grp
> +- role: build-dependency
> + uid: ../start
> +- role: build-dependency
> + uid: abi
> +- role: build-dependency
> + uid: obj
> +- role: build-dependency
> + uid: optloadoff
> +- role: build-dependency
> + uid: optnocachelen
> +- role: build-dependency
> + uid: optramlen
> +- role: build-dependency
> + uid: optramori
> +- role: build-dependency
> + uid: tsta72
> +- role: build-dependency
> + uid: ../../obj
> +- role: build-dependency
> + uid: ../../objirq
> +- role: build-dependency
> + uid: ../../optcachedata
> +- role: build-dependency
> + uid: ../../optcacheinst
> +- role: build-dependency
> + uid: ../../opto2
> +- role: build-dependency
> + uid: ../../bspopts
> +type: build
> +use-after: []
> +use-before: []
> diff --git a/spec/build/bsps/aarch64/a72/linkcmds_ilp32.yml b/spec/build/bsps/aarch64/a72/linkcmds_ilp32.yml
> new file mode 100644
> index 0000000000..13ff5021db
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/a72/linkcmds_ilp32.yml
> @@ -0,0 +1,71 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +build-type: config-file
> +content: |
> + /* SPDX-License-Identifier: BSD-2-Clause */
> +
> + /*
> + * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
> + * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> + MEMORY {
> + RAM : ORIGIN = ${BSP_A72_RAM_BASE} + ${BSP_A72_LOAD_OFFSET}, LENGTH = ${BSP_A72_RAM_LENGTH} - ${BSP_A72_LOAD_OFFSET} - ${BSP_A72_NOCACHE_LENGTH}
> + NOCACHE : ORIGIN = ${BSP_A72_RAM_BASE} + ${BSP_A72_RAM_LENGTH} - ${BSP_A72_NOCACHE_LENGTH}, LENGTH = ${BSP_A72_NOCACHE_LENGTH}
> + }
> +
> + REGION_ALIAS ("REGION_START", RAM);
> + REGION_ALIAS ("REGION_VECTOR", RAM);
> + REGION_ALIAS ("REGION_TEXT", RAM);
> + REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
> + REGION_ALIAS ("REGION_RODATA", RAM);
> + REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
> + REGION_ALIAS ("REGION_DATA", RAM);
> + REGION_ALIAS ("REGION_DATA_LOAD", RAM);
> + REGION_ALIAS ("REGION_FAST_TEXT", RAM);
> + REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
> + REGION_ALIAS ("REGION_FAST_DATA", RAM);
> + REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
> + REGION_ALIAS ("REGION_BSS", RAM);
> + REGION_ALIAS ("REGION_WORK", RAM);
> + REGION_ALIAS ("REGION_STACK", RAM);
> + REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
> + REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE);
> +
> + bsp_stack_exception_size = DEFINED (bsp_stack_exception_size) ? bsp_stack_exception_size : 1024;
> +
> + bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
> +
> + bsp_vector_table_in_start_section = 1;
> +
> + OUTPUT_FORMAT ("elf32-littleaarch64")
> + OUTPUT_ARCH (aarch64:ilp32)
> +
> + INCLUDE linkcmds.base
> +copyrights:
> +- Copyright (C) 2020 On-Line Applications Research (OAR)
> +enabled-by: true
> +install-path: ${BSP_LIBDIR}
> +links: []
> +target: linkcmds
> +type: build
> diff --git a/spec/build/bsps/aarch64/a72/linkcmds_lp64.yml b/spec/build/bsps/aarch64/a72/linkcmds_lp64.yml
> new file mode 100644
> index 0000000000..05daa739ce
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/a72/linkcmds_lp64.yml
> @@ -0,0 +1,71 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +build-type: config-file
> +content: |
> + /* SPDX-License-Identifier: BSD-2-Clause */
> +
> + /*
> + * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
> + * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> + MEMORY {
> + RAM : ORIGIN = ${BSP_A72_RAM_BASE} + ${BSP_A72_LOAD_OFFSET}, LENGTH = ${BSP_A72_RAM_LENGTH} - ${BSP_A72_LOAD_OFFSET} - ${BSP_A72_NOCACHE_LENGTH}
> + NOCACHE : ORIGIN = ${BSP_A72_RAM_BASE} + ${BSP_A72_RAM_LENGTH} - ${BSP_A72_NOCACHE_LENGTH}, LENGTH = ${BSP_A72_NOCACHE_LENGTH}
> + }
> +
> + REGION_ALIAS ("REGION_START", RAM);
> + REGION_ALIAS ("REGION_VECTOR", RAM);
> + REGION_ALIAS ("REGION_TEXT", RAM);
> + REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
> + REGION_ALIAS ("REGION_RODATA", RAM);
> + REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
> + REGION_ALIAS ("REGION_DATA", RAM);
> + REGION_ALIAS ("REGION_DATA_LOAD", RAM);
> + REGION_ALIAS ("REGION_FAST_TEXT", RAM);
> + REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
> + REGION_ALIAS ("REGION_FAST_DATA", RAM);
> + REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
> + REGION_ALIAS ("REGION_BSS", RAM);
> + REGION_ALIAS ("REGION_WORK", RAM);
> + REGION_ALIAS ("REGION_STACK", RAM);
> + REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
> + REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE);
> +
> + bsp_stack_exception_size = DEFINED (bsp_stack_exception_size) ? bsp_stack_exception_size : 1024;
> +
> + bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
> +
> + bsp_vector_table_in_start_section = 1;
> +
> + OUTPUT_FORMAT ("elf64-littleaarch64")
> + OUTPUT_ARCH (aarch64)
> +
> + INCLUDE linkcmds.base
> +copyrights:
> +- Copyright (C) 2020 On-Line Applications Research (OAR)
> +enabled-by: true
> +install-path: ${BSP_LIBDIR}
> +links: []
> +target: linkcmds
> +type: build
> diff --git a/spec/build/bsps/aarch64/a72/obj.yml b/spec/build/bsps/aarch64/a72/obj.yml
> new file mode 100644
> index 0000000000..812b21be67
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/a72/obj.yml
> @@ -0,0 +1,37 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +build-type: objects
> +cflags: []
> +copyrights:
> +- Copyright (C) 2020 On-Line Applications Research (OAR)
> +cppflags: []
> +cxxflags: []
> +enabled-by: true
> +includes: []
> +install:
> +- destination: ${BSP_INCLUDEDIR}
> + source:
> + - bsps/aarch64/a72/include/bsp.h
> + - bsps/aarch64/a72/include/tm27.h
> +- destination: ${BSP_INCLUDEDIR}/bsp
> + source:
> + - bsps/aarch64/a72/include/bsp/irq.h
> +links: []
> +source:
> +- bsps/aarch64/a72/console/console.c
> +- bsps/aarch64/a72/start/bspstart.c
> +- bsps/aarch64/a72/start/bspstarthooks.c
> +- bsps/aarch64/shared/cache/cache.c
> +- bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c
> +- bsps/shared/dev/btimer/btimer-cpucounter.c
> +- bsps/shared/dev/clock/arm-generic-timer.c
> +- bsps/shared/dev/getentropy/getentropy-cpucounter.c
> +- bsps/shared/dev/irq/arm-gicv3.c
> +- bsps/shared/dev/serial/console-termios-init.c
> +- bsps/shared/dev/serial/console-termios.c
> +- bsps/shared/irq/irq-default-handler.c
> +- bsps/shared/start/bspfatal-default.c
> +- bsps/shared/start/bspgetworkarea-default.c
> +- bsps/shared/start/bspreset-arm-psci.c
> +- bsps/shared/start/gettargethash-default.c
> +- bsps/shared/start/sbrk.c
> +type: build
> diff --git a/spec/build/bsps/aarch64/a72/optloadoff.yml b/spec/build/bsps/aarch64/a72/optloadoff.yml
> new file mode 100644
> index 0000000000..cbe390c2f6
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/a72/optloadoff.yml
> @@ -0,0 +1,18 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +actions:
> +- get-integer: null
> +- assert-uint32: null
> +- env-assign: null
> +- format-and-define: null
> +build-type: option
> +copyrights:
> +- Copyright (C) 2020 On-Line Applications Research (OAR)
> +default: 32768
> +default-by-variant: []
> +description: |
> + offset of RAM region from memory area base
> +enabled-by: true
> +format: '{:#010x}'
> +links: []
> +name: BSP_A72_LOAD_OFFSET
> +type: build
> diff --git a/spec/build/bsps/aarch64/a72/optnocachelen.yml b/spec/build/bsps/aarch64/a72/optnocachelen.yml
> new file mode 100644
> index 0000000000..47d55be601
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/a72/optnocachelen.yml
> @@ -0,0 +1,18 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +actions:
> +- get-integer: null
> +- assert-uint32: null
> +- env-assign: null
> +- format-and-define: null
> +build-type: option
> +copyrights:
> +- Copyright (C) 2020 On-Line Applications Research (OAR)
> +default: 1048576
> +default-by-variant: []
> +description: |
> + length of nocache RAM region
> +enabled-by: true
> +format: '{:#010x}'
> +links: []
> +name: BSP_A72_NOCACHE_LENGTH
> +type: build
> diff --git a/spec/build/bsps/aarch64/a72/optramlen.yml b/spec/build/bsps/aarch64/a72/optramlen.yml
> new file mode 100644
> index 0000000000..b18ef2ff08
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/a72/optramlen.yml
> @@ -0,0 +1,18 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +actions:
> +- get-integer: null
> +- assert-uint32: null
> +- env-assign: null
> +- format-and-define: null
> +build-type: option
> +copyrights:
> +- Copyright (C) 2020 On-Line Applications Research (OAR)
> +default: 0x8000000
> +default-by-variant: []
> +description: |
> + length of memory area available to the BSP
> +enabled-by: true
> +format: '{:#010x}'
> +links: []
> +name: BSP_A72_RAM_LENGTH
> +type: build
> diff --git a/spec/build/bsps/aarch64/a72/optramori.yml b/spec/build/bsps/aarch64/a72/optramori.yml
> new file mode 100644
> index 0000000000..be92685f83
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/a72/optramori.yml
> @@ -0,0 +1,18 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +actions:
> +- get-integer: null
> +- assert-uint32: null
> +- env-assign: null
> +- format-and-define: null
> +build-type: option
> +copyrights:
> +- Copyright (C) 2020 On-Line Applications Research (OAR)
> +default: 1073741824
> +default-by-variant: []
> +description: |
> + base address of memory area available to the BSP
> +enabled-by: true
> +format: '{:#010x}'
> +links: []
> +name: BSP_A72_RAM_BASE
> +type: build
> diff --git a/spec/build/bsps/aarch64/a72/tsta72.yml b/spec/build/bsps/aarch64/a72/tsta72.yml
> new file mode 100644
> index 0000000000..6876d23f56
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/a72/tsta72.yml
> @@ -0,0 +1,41 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +actions:
> +- set-test-state:
> + # expected to fail, don't compile these
> + minimum: exclude
> +
> + # don't compile due to toolchain issues
> + spconfig01: exclude
> + spmisc01: exclude
> +
> + # tests that are passing intermittently
> + spcpucounter01: indeterminate
> + rtmonuse: indeterminate
> + sp68: indeterminate
> + sp04: indeterminate
> + sp20: indeterminate
> + sp69: indeterminate
> + rtmonusxtimes01: indeterminate
> + spedfsched02: indeterminate
> + spedfsched04: indeterminate
> + psxtimes01: indeterminate
> + sprmsched01: indeterminate
> + sptimecounter02: indeterminate
> + sptimecounter04: indeterminate
> + ttest02: indeterminate
> +
> + # tests that pass nominally, but fail under Qemu when the host is under
> + # heavy load
> + psx12: indeterminate
> + spintrcritical03: indeterminate
> + spintrcritical04: indeterminate
> + spintrcritical05: indeterminate
> +build-type: option
> +copyrights:
> +- Copyright (C) 2020 On-Line Applications Research (OAR)
> +default: null
> +default-by-variant: []
> +description: ''
> +enabled-by: true
> +links: []
> +type: build
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