[PATCH rtems-docs] user/bsps: Add STM32H7 SDMMC driver

Christian Mauderer christian.mauderer at embedded-brains.de
Thu Mar 25 08:35:58 UTC 2021


---
 user/bsps/arm/stm32h7.rst | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/user/bsps/arm/stm32h7.rst b/user/bsps/arm/stm32h7.rst
index 3eee511..483d029 100644
--- a/user/bsps/arm/stm32h7.rst
+++ b/user/bsps/arm/stm32h7.rst
@@ -31,3 +31,29 @@ USB Host Driver
 ---------------
 
 The USB host driver ``dwc_otg`` is provided by the ``libbsd``.
+
+SD/MMC Driver
+-------------
+
+The SDMMC driver ``st_sdmmc`` is provided by the ``libbsd``.
+
+The default initialization is done for the STM32H743I-EVAL 2 board.
+
+To use different pins, you can create a ``HAL_SD_MspInit()`` function in your
+application that overwrites the default one defined in ``RTEMS``. If you don't
+have direction lines like on the evaluation board, you can just skip
+initializing these pins.
+
+If you want to use a different number of data lines, another polarity for the
+data direction pins, a different voltage or similar, you have to redefine
+``st_sdmmc_get_config()`` (normally provided by ``libbsd``) in your application.
+
+Known limitations:
+
+* Currently 1.8V signaling is not implemented. Therefore higher speeds like used
+  for UHS cards are not available. All cards fall back to High Speed transfers.
+* The driver uses the IDMA only. MDMA is currently not implemented. For SDMMC1
+  that means that the memory buffers can only come from AXI SRAM, QSPI memory,
+  Flash or the FMC (SDRAM, ...). The internal SRAM1, SRAM2, SRAM3 and SRAM4 is
+  not supported. SDMMC2 should not have that limitation. See ST AN5200 "Getting
+  started with STM32H7 Series SDMMC host controller" for more details.
-- 
2.26.2



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