[PATCH] riscv/start: Startup sequence update.

[somesh deshmukh]

On Mon, May 3, 2021 at 5:36 PM Sebastian Huber <
sebastian.huber at embedded-brains.de> wrote:

> On 03/05/2021 13:47, somesh deshmukh wrote:
>
> > I performed the following sequence of instruction:
> > ./waf clean
> > ./waf configure
> > ./waf
> >
> > Tried this couple of times but the same result always.
> > I will try this again with fresh sources from rsb and rtems master
> > branches.
>
> Now it should work. I forgot to update the build specification file
> which generates the linker command file.
>
> Is it available in master?

Do you use
>
> BSP_FDT_BLOB_READ_ONLY = False
> BSP_FDT_BLOB_COPY_TO_READ_ONLY_LOAD_AREA = False
>
> in your config.ini?
>
This is my config.ini file

[riscv/rv64imafdc_medany]
BUILD_TESTS = False
RISCV_RAM_REGION_BEGIN = 0x80100000
RISCV_RAM_REGION_SIZE  = 0x100000
RTEMS_SMP = False
BSP_FDT_BLOB_COPY_TO_READ_ONLY_LOAD_AREA = False
BSP_FDT_BLOB_READ_ONLY = False
RISCV_CONSOLE_MAX_NS16550_DEVICES = 1

>
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