[PATCH 3/5] bsps/imxrt: Add addresses and interrupts to dts

[Christian Mauderer]

Add addresses and interrupts for most internal peripherals to the dts.
The additional aliases make it possible for an application to easily
access these informations.

Update #4180
---
 bsps/arm/imxrt/dts/imxrt1050-evkb.c         | 1628 ++++++++++++++-----
 bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi |  544 ++++++-
 2 files changed, 1651 insertions(+), 521 deletions(-)

diff --git a/bsps/arm/imxrt/dts/imxrt1050-evkb.c b/bsps/arm/imxrt/dts/imxrt1050-evkb.c
index b93dcd775b..301e790c6b 100644
--- a/bsps/arm/imxrt/dts/imxrt1050-evkb.c
+++ b/bsps/arm/imxrt/dts/imxrt1050-evkb.c
@@ -7,10 +7,10 @@
 #include <sys/types.h>
 
 const unsigned char imxrt_dtb[] = {
-  0xd0, 0x0d, 0xfe, 0xed, 0x00, 0x00, 0x1d, 0x73, 0x00, 0x00, 0x00, 0x38, 
-  0x00, 0x00, 0x1b, 0xcc, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x11, 
-  0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x67, 
-  0x00, 0x00, 0x1b, 0x94, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0xd0, 0x0d, 0xfe, 0xed, 0x00, 0x00, 0x3f, 0xf6, 0x00, 0x00, 0x00, 0x38, 
+  0x00, 0x00, 0x3b, 0xf8, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x11, 
+  0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0xbe, 
+  0x00, 0x00, 0x3b, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 
@@ -24,476 +24,1086 @@ const unsigned char imxrt_dtb[] = {
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+  0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x03, 0x3f, 
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@@ -501,18 +1111,18 @@ const unsigned char imxrt_dtb[] = {
   0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 
   0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 
   0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 
-  0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x45, 0x6e, 0x78, 0x70, 0x2c, 
+  0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x02, 0x9c, 0x6e, 0x78, 0x70, 0x2c, 
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-  0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x76, 
+  0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x02, 0xcd, 
   0x40, 0x39, 0xc0, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x03, 
-  0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xac, 0x00, 0x00, 0x00, 0x22, 
-  0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x82, 
+  0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x02, 0xf8, 0x00, 0x00, 0x00, 0x22, 
+  0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x02, 0xd9, 
   0x64, 0x69, 0x73, 0x61, 0x62, 0x6c, 0x65, 0x64, 0x00, 0x00, 0x00, 0x00, 
-  0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x00, 0xd3, 
+  0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x03, 0x2a, 
   0x2f, 0x64, 0x65, 0x76, 0x2f, 0x73, 0x70, 0x69, 0x33, 0x00, 0x00, 0x00, 
-  0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0xde, 
+  0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x03, 0x35, 
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-  0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0xe8, 0x00, 0x00, 0x00, 0x02, 
+  0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x03, 0x3f, 0x00, 0x00, 0x00, 0x02, 
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x02, 
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x02, 
   0x00, 0x00, 0x00, 0x01, 0x73, 0x70, 0x69, 0x40, 0x34, 0x30, 0x33, 0x61, 
@@ -520,122 +1130,248 @@ const unsigned char imxrt_dtb[] = {
   0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 
   0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0f, 
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x10, 
-  0x00, 0x00, 0x00, 0x45, 0x6e, 0x78, 0x70, 0x2c, 0x69, 0x6d, 0x78, 0x72, 
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-  0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x76, 0x40, 0x3a, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x02, 0xcd, 0x40, 0x3a, 0x00, 0x00, 
   0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 
-  0x00, 0x00, 0x00, 0xac, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x03, 
-  0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x82, 0x64, 0x69, 0x73, 0x61, 
+  0x00, 0x00, 0x02, 0xf8, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x03, 
+  0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x02, 0xd9, 0x64, 0x69, 0x73, 0x61, 
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+  0x6c, 0x2c, 0x70, 0x69, 0x6e, 0x73, 0x00, 0x69, 0x6e, 0x74, 0x65, 0x72, 
+  0x72, 0x75, 0x70, 0x74, 0x2d, 0x6e, 0x61, 0x6d, 0x65, 0x73, 0x00, 0x66, 
+  0x73, 0x6c, 0x2c, 0x6e, 0x75, 0x6d, 0x2d, 0x74, 0x78, 0x2d, 0x71, 0x75, 
+  0x65, 0x75, 0x65, 0x73, 0x00, 0x66, 0x73, 0x6c, 0x2c, 0x6e, 0x75, 0x6d, 
+  0x2d, 0x72, 0x78, 0x2d, 0x71, 0x75, 0x65, 0x75, 0x65, 0x73, 0x00, 0x70, 
+  0x68, 0x79, 0x2d, 0x6d, 0x6f, 0x64, 0x65, 0x00, 0x70, 0x68, 0x79, 0x2d, 
+  0x72, 0x65, 0x73, 0x65, 0x74, 0x2d, 0x67, 0x70, 0x69, 0x6f, 0x73, 0x00, 
+  0x72, 0x74, 0x65, 0x6d, 0x73, 0x2c, 0x70, 0x68, 0x79, 0x2d, 0x69, 0x6e, 
+  0x74, 0x65, 0x72, 0x72, 0x75, 0x70, 0x74, 0x2d, 0x67, 0x70, 0x69, 0x6f, 
+  0x73, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-  0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
 };
 
 const size_t imxrt_dtb_size = sizeof(imxrt_dtb);
diff --git a/bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi b/bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi
index 610aa37e33..69095fea23 100644
--- a/bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi
+++ b/bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi
@@ -31,11 +31,102 @@
 	chosen: chosen {};
 
 	aliases {
+		acmp = &acmp;
+		adc1 = &adc1;
+		adc2 = &adc2;
+		adc-etc = &adc_etc;
+		aips1-config = &aips1_config;
+		aips2-config = &aips2_config;
+		aips3-config = &aips3_config;
+		aips4-config = &aips4_config;
+		analog = &analog;
+		aoi1 = &aoi1;
+		aoi2 = &aoi2;
+		bee = &bee;
+		ccm = &ccm;
+		csi = &csi;
+		csu = &csu;
+		dcdc = &dcdc;
+		dcp = &dcp;
+		dma-ch-mux = &dma_ch_mux;
+		edma = &edma;
+		enc1 = &enc1;
+		enc2 = &enc2;
+		enc3 = &enc3;
+		enc4 = &enc4;
+		ewm = &ewm;
+		fec1 = &fec1;
+		flexcan1 = &flexcan1;
+		flexcan2 = &flexcan2;
+		flexio1 = &flexio1;
+		flexio2 = &flexio2;
+		flexpwm1 = &flexpwm1;
+		flexpwm2 = &flexpwm2;
+		flexpwm3 = &flexpwm3;
+		flexpwm4 = &flexpwm4;
+		flexram = &flexram;
+		flexspi = &flexspi;
+		gpc = &gpc;
+		/*
+		 * Linux convention starts GPIO at 0. Therefore the driver
+		 * shared with i.MX6 expects 0 too.
+		 */
 		gpio0 = &gpio1;
 		gpio1 = &gpio2;
 		gpio2 = &gpio3;
 		gpio3 = &gpio4;
 		gpio4 = &gpio5;
+		gpt1 = &gpt1;
+		gpt2 = &gpt2;
+		iomuxc = &iomuxc;
+		iomuxc-gpr = &iomuxc_gpr;
+		iomuxc-snvs = &iomuxc_snvs;
+		iomuxc-snvs-gpr = &iomuxc_snvs_gpr;
+		kpp = &kpp;
+		lcdif = &lcdif;
+		lpi2c1 = &lpi2c1;
+		lpi2c2 = &lpi2c2;
+		lpi2c3 = &lpi2c3;
+		lpi2c4 = &lpi2c4;
+		lpspi1 = &lpspi1;
+		lpspi2 = &lpspi2;
+		lpspi3 = &lpspi3;
+		lpspi4 = &lpspi4;
+		lpuart1 = &lpuart1;
+		lpuart2 = &lpuart2;
+		lpuart3 = &lpuart3;
+		lpuart4 = &lpuart4;
+		lpuart5 = &lpuart5;
+		lpuart6 = &lpuart6;
+		lpuart7 = &lpuart7;
+		lpuart8 = &lpuart8;
+		ocotp = &ocotp;
+		pit = &pit;
+		pxp = &pxp;
+		qtimer1 = &qtimer1;
+		qtimer2 = &qtimer2;
+		qtimer3 = &qtimer3;
+		qtimer4 = &qtimer4;
+		romcp = &romcp;
+		sai1 = &sai1;
+		sai2 = &sai2;
+		sai3 = &sai3;
+		semc = &semc;
+		sjc = &sjc;
+		snvs-hp = &snvs_hp;
+		spdif = &spdif;
+		src = &src;
+		trng = &trng;
+		tsc-dig = &tsc_dig;
+		usb = &usb;
+		usdhc1 = &usdhc1;
+		usdhc2 = &usdhc2;
+		wdog1 = &wdog1;
+		wdog2 = &wdog2;
+		wdog3 = &wdog3;
+		xbar1 = &xbar1;
+		xbar2 = &xbar2;
+		xbar3 = &xbar3;
 	};
 
 	nvic: interrupt-controller at e000e100  {
@@ -65,21 +156,53 @@
 			reg = <0x40000000 0x00100000>;
 			ranges;
 
-			edma: dma-controller at 400e8000 {
-				/*
-				 * FIXME: The driver currently doesn't use
-				 * these. So only keep it here so that others
-				 * can reference the channel numbers.
-				 */
-				compatible = "fsl,imxrt-edma";
-				/*
-				 * Use DMA cells just like Linux:
-				 * First cell is the DMAMUX which is allways 0
-				 * in our case. Second one is the request
-				 * source.
-				 */
-				#dma-cells = <2>;
-				reg = <0x400e8000 0x4000>;
+			aips1_config: aips_config at 4007c000 {
+				reg = <0x4007c000 0x4000>;
+			};
+
+			dcdc: dcdc at 40080000 {
+				reg = <0x40080000 0x4000>;
+				interrupts = <69>;
+			};
+
+			pit: pit at 40084000 {
+				reg = <0x40084000 0x4000>;
+				interrupts = <122>;
+			};
+
+			acmp: acmp at 40094000 {
+				reg = <0x40094000 0x4000>;
+				interrupts = <123>, <124>, <125>, <126>;
+			};
+
+			iomuxc_snvs_gpr: iomuxc_snvs_gpr at 400a4000 {
+				reg = <0x400a4000 0x4000>;
+			};
+
+			iomuxc_snvs: iomuxc_snvs at 400a8000 {
+				reg = <0x400a8000 0x4000>;
+			};
+
+			iomuxc_gpr: iomuxc_gpr at 400ac000 {
+				reg = <0x400ac000 0x4000>;
+			};
+
+			flexram: flexram at 400b0000 {
+				reg = <0x400b0000 0x4000>;
+			};
+
+			ewm: ewm at 400b4000 {
+				reg = <0x400b4000 0x4000>;
+				interrupts = <94>;
+			};
+
+			wdog1: wdog at 400b8000 {
+				reg = <0x400b8000 0x4000>;
+				interrupts = <92>;
+			};
+
+			wdog3: wdog at 400bc000 {
+				reg = <0x400bc000 0x4000>;
 			};
 
 			gpio5: gpio at 400c0000 {
@@ -92,82 +215,101 @@
 				interrupt-controller;
 				#interrupt-cells = <2>;
 			};
-		};
 
-		aips-bus at 40100000 {
-			compatible = "fsl,aips-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x40100000 0x00100000>;
-			ranges;
+			adc1: adc at 400c4000 {
+				reg = <0x400c4000 0x4000>;
+				interrupts = <67>;
+			};
 
-			qtimer4: timer at 401e8000 {
-				compatible = "nxp,imxrt-qtimer";
-				reg = <0x401e8000 0x4000>;
-				interrupts = <136>;
+			adc2: adc at 400c8000 {
+				reg = <0x400c8000 0x4000>;
+				interrupts = <68>;
 			};
 
-			qtimer3: timer at 401e4000 {
-				compatible = "nxp,imxrt-qtimer";
-				reg = <0x401e4000 0x4000>;
-				interrupts = <135>;
+			trng: trng at 400cc000 {
+				reg = <0x400cc000 0x4000>;
+				interrupts = <53>;
 			};
 
-			qtimer2: timer at 401e0000 {
-				compatible = "nxp,imxrt-qtimer";
-				reg = <0x401e0000 0x4000>;
-				interrupts = <134>;
+			wdog2: wdog at 400d0000 {
+				reg = <0x400d0000 0x4000>;
+				interrupts = <45>;
 			};
 
-			qtimer1: timer at 401dc000 {
-				compatible = "nxp,imxrt-qtimer";
-				reg = <0x401dc000 0x4000>;
-				interrupts = <133>;
+			snvs_hp: snvs_hp at 400d4000 {
+				reg = <0x400d4000 0x4000>;
+				interrupts = <46>, <47>, <48>;
 			};
 
-			gpio4: gpio at 401c4000 {
-				compatible = "fsl,imxrt-gpio",
-				    "fsl,imx6ul-gpio", "fsl,imx35-gpio";
-				reg = <0x401c4000 0x4000>;
-				interrupts = <86>, <87>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
+			analog: analog at 400d8000 {
+				reg = <0x400d8000 0x4000>;
 			};
 
-			gpio3: gpio at 401c0000 {
-				compatible = "fsl,imxrt-gpio",
-				    "fsl,imx6ul-gpio", "fsl,imx35-gpio";
-				reg = <0x401c0000 0x4000>;
-				interrupts = <84>, <85>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
+			csu: csu at 400dc000 {
+				reg = <0x400dc000 0x4000>;
+				interrupts = <49>;
 			};
 
-			gpio2: gpio at 401bc000 {
-				compatible = "fsl,imxrt-gpio",
-				    "fsl,imx6ul-gpio", "fsl,imx35-gpio";
-				reg = <0x401bc000 0x4000>;
-				interrupts = <82>, <83>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
+			tsc_dig: tsc_dig at 400e0000 {
+				reg = <0x400e0000 0x4000>;
+				interrupts = <40>;
 			};
 
-			gpio1: gpio at 401b8000 {
-				compatible = "fsl,imxrt-gpio",
-				    "fsl,imx6ul-gpio", "fsl,imx35-gpio";
-				reg = <0x401b8000 0x4000>;
-				interrupts = <80>, <81>, <72>, <73>, <74>,
-				    <75>, <76>, <77>, <78>, <79>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
+			sjc: sjc at 400e4000 {
+				reg = <0x400e4000 0x4000>;
+			};
+
+			edma: dma-controller at 400e8000 {
+				compatible = "fsl,imxrt-edma";
+				/*
+				 * Use DMA cells just like Linux:
+				 * First cell is the DMAMUX which is allways 0
+				 * in our case. Second one is the request
+				 * source.
+				 */
+				#dma-cells = <2>;
+				reg = <0x400e8000 0x4000>;
+				interrupts = <0>, <1>, <2>, <3>,
+				             <4>, <5>, <6>, <7>,
+					     <8>, <9>, <10>, <11>,
+					     <12>, <13>, <14>, <15>,
+					     <16>;
+			};
+
+			dma_ch_mux: dma_ch_mux at 400ec000 {
+				reg = <0x400ec000 0x4000>;
+			};
+
+			gpc: gpc at 400f4000 {
+				reg = <0x400f4000 0x4000>;
+				interrupts = <97>;
+			};
+
+			src: src at 400f8000 {
+				reg = <0x400f8000 0x4000>;
+				interrupts = <98>;
+			};
+
+			ccm: ccm at 400fc000 {
+				reg = <0x400fc000 0x4000>;
+				interrupts = <95>, <96>;
+			};
+
+		};
+
+		aips-bus at 40100000 {
+			compatible = "fsl,aips-bus", "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg = <0x40100000 0x00100000>;
+			ranges;
+
+			aips2_config: aips_config at 4017c000 {
+				reg = <0x4017c000 0x4000>;
+			};
+
+			romcp: romcp at 40180000 {
+				reg = <0x40180000 0x4000>;
 			};
 
 			lpuart1: uart at 40184000 {
@@ -250,10 +392,118 @@
 				dmas = <&edma 0 72>, <&edma 0 73>;
 			};
 
+			flexio1: can at 401ac000 {
+				reg = <0x401ac000 0x4000>;
+				interrupts = <90>;
+			};
+
+			flexio2: can at 401b0000 {
+				reg = <0x401b0000 0x4000>;
+				interrupts = <91>;
+			};
+
+			gpio1: gpio at 401b8000 {
+				compatible = "fsl,imxrt-gpio",
+				    "fsl,imx6ul-gpio", "fsl,imx35-gpio";
+				reg = <0x401b8000 0x4000>;
+				interrupts = <80>, <81>, <72>, <73>, <74>,
+				    <75>, <76>, <77>, <78>, <79>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+			};
+
+			gpio2: gpio at 401bc000 {
+				compatible = "fsl,imxrt-gpio",
+				    "fsl,imx6ul-gpio", "fsl,imx35-gpio";
+				reg = <0x401bc000 0x4000>;
+				interrupts = <82>, <83>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+			};
+
+			gpio3: gpio at 401c0000 {
+				compatible = "fsl,imxrt-gpio",
+				    "fsl,imx6ul-gpio", "fsl,imx35-gpio";
+				reg = <0x401c0000 0x4000>;
+				interrupts = <84>, <85>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+			};
+
+			gpio4: gpio at 401c4000 {
+				compatible = "fsl,imxrt-gpio",
+				    "fsl,imx6ul-gpio", "fsl,imx35-gpio";
+				reg = <0x401c4000 0x4000>;
+				interrupts = <86>, <87>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+			};
+
+			flexcan1: can at 401d0000 {
+				reg = <0x401d0000 0x4000>;
+				interrupts = <36>;
+			};
+
+			flexcan2: can at 401d4000 {
+				reg = <0x401d4000 0x4000>;
+				interrupts = <37>;
+			};
+
+			qtimer1: timer at 401dc000 {
+				compatible = "nxp,imxrt-qtimer";
+				reg = <0x401dc000 0x4000>;
+				interrupts = <133>;
+			};
+
+			qtimer2: timer at 401e0000 {
+				compatible = "nxp,imxrt-qtimer";
+				reg = <0x401e0000 0x4000>;
+				interrupts = <134>;
+			};
+
+			qtimer3: timer at 401e4000 {
+				compatible = "nxp,imxrt-qtimer";
+				reg = <0x401e4000 0x4000>;
+				interrupts = <135>;
+			};
+
+			qtimer4: timer at 401e8000 {
+				compatible = "nxp,imxrt-qtimer";
+				reg = <0x401e8000 0x4000>;
+				interrupts = <136>;
+			};
+
+			gpt1: timer at 401ec000 {
+				reg = <0x401ec000 0x4000>;
+				interrupts = <100>;
+			};
+
+			gpt2: timer at 401f0000 {
+				reg = <0x401f0000 0x4000>;
+				interrupts = <101>;
+			};
+
+			ocotp: ocotp at 401f4000 {
+				reg = <0x401f4000 0x4000>;
+			};
+
 			iomuxc: pinctrl at 401f8000 {
 				compatible = "nxp,imxrt1050-iomuxc";
 				reg = <0x401f8000 0x4000>;
 			};
+
+			kpp: kpp at 401fc000 {
+				reg = <0x401fc000 0x4000>;
+				interrupts = <39>;
+			};
 		};
 
 		aips-bus at 40200000 {
@@ -263,6 +513,40 @@
 			reg = <0x40200000 0x00100000>;
 			ranges;
 
+			aips3_config: aips_config at 4027c000 {
+				reg = <0x4027c000 0x4000>;
+			};
+
+			flexspi: spi at 402a8000 {
+				reg = <0x402a8000 0x4000>;
+				interrupts = <108>;
+			};
+
+			pxp: pxp at 402b4000 {
+				reg = <0x402b4000 0x4000>;
+				interrupts = <44>;
+			};
+
+			lcdif: lcdif at 402b8000 {
+				reg = <0x402b8000 0x4000>;
+				interrupts = <42>;
+			};
+
+			csi: csi at 402bc000 {
+				reg = <0x402bc000 0x4000>;
+				interrupts = <43>;
+			};
+
+			usdhc1: sdhci at 402c0000 {
+				reg = <0x402c0000 0x4000>;
+				interrupts = <110>;
+			};
+
+			usdhc2: sdhci at 402c4000 {
+				reg = <0x402c4000 0x4000>;
+				interrupts = <111>;
+			};
+
 			fec1: ethernet at 402d8000 {
 				compatible = "fsl,imxrt-fec", "fsl,imx6ul-fec";
 				reg = <0x402d8000 0x4000>;
@@ -273,6 +557,21 @@
 				phy-mode = "rmii";
 				status = "disabled";
 			};
+
+			usb: usb at 402e0000 {
+				reg = <0x402e0000 0x4000>;
+				interrupts = <65>, <66>, <112>, <113>;
+			};
+
+			semc: semc at 402f0000 {
+				reg = <0x402f0000 0x4000>;
+				interrupts = <109>;
+			};
+
+			dcp: dcp at 402fc000 {
+				reg = <0x402fc000 0x4000>;
+				interrupts = <50>, <51>, <52>;
+			};
 		};
 
 		aips-bus at 40300000 {
@@ -282,6 +581,30 @@
 			reg = <0x40300000 0x00100000>;
 			ranges;
 
+			aips4_config: aips_config at 4037c000 {
+				reg = <0x4037c000 0x4000>;
+			};
+
+			spdif: spdif at 40380000 {
+				reg = <0x40380000 0x4000>;
+				interrupts = <60>;
+			};
+
+			sai1: sai at 40384000 {
+				reg = <0x40384000 0x4000>;
+				interrupts = <56>;
+			};
+
+			sai2: sai at 40388000 {
+				reg = <0x40388000 0x4000>;
+				interrupts = <57>;
+			};
+
+			sai3: sai at 4038c000 {
+				reg = <0x4038c000 0x4000>;
+				interrupts = <58>, <59>;
+			};
+
 			lpspi1: spi at 40394000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
@@ -330,6 +653,77 @@
 				dmas = <&edma 0 80>, <&edma 0 79>;
 			};
 
+			adc_etc: adc at 403b0000 {
+				reg = <0x403b0000 0x4000>;
+				interrupts = <118>, <119>, <120>, <121>;
+			};
+
+			aoi1: aoi at 403b4000 {
+				reg = <0x403b4000 0x4000>;
+			};
+
+			aoi2: aoi at 403b8000 {
+				reg = <0x403b8000 0x4000>;
+			};
+
+			xbar1: xbar at 403bc000 {
+				reg = <0x403bc000 0x4000>;
+				interrupts = <116>, <117>;
+			};
+
+			xbar2: xbar at 403c0000 {
+				reg = <0x403c0000 0x4000>;
+			};
+
+			xbar3: xbar at 403c4000 {
+				reg = <0x403c4000 0x4000>;
+			};
+
+			enc1: enc at 403c8000 {
+				reg = <0x403c8000 0x4000>;
+				interrupts = <129>;
+			};
+
+			enc2: enc at 403cc000 {
+				reg = <0x403cc000 0x4000>;
+				interrupts = <130>;
+			};
+
+			enc3: enc at 403d0000 {
+				reg = <0x403d0000 0x4000>;
+				interrupts = <131>;
+			};
+
+			enc4: enc at 403d4000 {
+				reg = <0x403d4000 0x4000>;
+				interrupts = <132>;
+			};
+
+			flexpwm1: pwm at 403dc000 {
+				reg = <0x403dc000 0x4000>;
+				interrupts = <102>, <103>, <104>, <105>, <106>;
+			};
+
+			flexpwm2: pwm at 403e0000 {
+				reg = <0x403e0000 0x4000>;
+				interrupts = <137>, <138>, <139>, <140>, <141>;
+			};
+
+			flexpwm3: pwm at 403e4000 {
+				reg = <0x403e4000 0x4000>;
+				interrupts = <142>, <143>, <144>, <145>, <146>;
+			};
+
+			flexpwm4: pwm at 403e8000 {
+				reg = <0x403e8000 0x4000>;
+				interrupts = <147>, <148>, <149>, <150>, <151>;
+			};
+
+			bee: bee at 403ec000 {
+				reg = <0x403ec000 0x4000>;
+				interrupts = <55>;
+			};
+
 			lpi2c1: i2c at 403f0000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
-- 
2.26.2