[PATCH 2/3] bsps/aarch64: use SMC API in bspsmp-arm-psci

Gedare Bloom gedare at rtems.org
Sat Oct 16 20:12:24 UTC 2021


---
 bsps/shared/start/bspsmp-arm-psci.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/bsps/shared/start/bspsmp-arm-psci.c b/bsps/shared/start/bspsmp-arm-psci.c
index 1ff5b7bb89..749885ef7d 100644
--- a/bsps/shared/start/bspsmp-arm-psci.c
+++ b/bsps/shared/start/bspsmp-arm-psci.c
@@ -41,6 +41,7 @@
 #if defined( AARCH64_MULTILIB_ARCH_V8 ) || \
   defined( AARCH64_MULTILIB_ARCH_V8_ILP32 )
 #include <rtems/score/aarch64-system-registers.h>
+#include <rtems/score/aarch64-smc.h>
 #else
 #include <rtems/score/aarch32-system-registers.h>
 #endif
@@ -67,22 +68,33 @@ bool _CPU_SMP_Start_processor( uint32_t cpu_index )
   target_cpu &= ~( 0xff0000ffUL );
   target_cpu |= cpu_index;
 
+#ifdef BSP_CPU_ON_USES_SMC
+  ret = _AArch64_SMC_Invoke(
+      PSCI_FN_SYSTEM_CPU_ON,
+      target_cpu,
+      _start,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      NULL
+  );
+#else
   __asm__ volatile (
     "mov " REGISTER_PREFIX "0, %1\n"
     "mov " REGISTER_PREFIX "1, %2\n"
     "mov " REGISTER_PREFIX "2, %3\n"
     "mov " REGISTER_PREFIX "3, #0\n"
-#ifdef BSP_CPU_ON_USES_SMC
-    "smc #0\n"
-#else
     "hvc #0\n"
-#endif
     "mov %0, " REGISTER_PREFIX "0\n"
     : "=r" ( ret ) : "r" ( PSCI_FN_SYSTEM_CPU_ON ), "r" ( target_cpu ),
     "r" ( _start )
     : REGISTER_PREFIX "0", REGISTER_PREFIX "1", REGISTER_PREFIX "2",
     REGISTER_PREFIX "3"
   );
+#endif
 
   if ( ret != 0 ) {
     return false;
-- 
2.25.1



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