[PATCH 13/14] bsp/stm32h7: properly ifdef all unsupported features in start -hal file while compiling for STM32H7B3I-DK BSP

[Karel Gardas]

---
 bsps/arm/stm32h7/start/stm32h7-hal.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/bsps/arm/stm32h7/start/stm32h7-hal.c b/bsps/arm/stm32h7/start/stm32h7-hal.c
index d042a5b8c9..ecd8e4218a 100644
--- a/bsps/arm/stm32h7/start/stm32h7-hal.c
+++ b/bsps/arm/stm32h7/start/stm32h7-hal.c
@@ -132,13 +132,23 @@ static const stm32h7_clk_info stm32h7_clk[] = {
   [STM32H7_MODULE_USART10] = { NULL, 0 },
 #endif
   [STM32H7_MODULE_RNG] = { &RCC->AHB2ENR, RCC_AHB2ENR_RNGEN },
+#ifdef RCC_AHB1ENR_ETH1MACEN
   [STM32H7_MODULE_ETH1MAC] = { &RCC->AHB1ENR, RCC_AHB1ENR_ETH1MACEN },
+#endif
+#ifdef RCC_AHB1ENR_ETH1TXEN
   [STM32H7_MODULE_ETH1TX] = { &RCC->AHB1ENR, RCC_AHB1ENR_ETH1TXEN },
+#endif
+#ifdef RCC_AHB1ENR_ETH1RXEN
   [STM32H7_MODULE_ETH1RX] = { &RCC->AHB1ENR, RCC_AHB1ENR_ETH1RXEN },
+#endif
   [STM32H7_MODULE_USB1_OTG] = { &RCC->AHB1ENR, RCC_AHB1ENR_USB1OTGHSEN },
   [STM32H7_MODULE_USB1_OTG_ULPI] = { &RCC->AHB1ENR, RCC_AHB1ENR_USB1OTGHSULPIEN },
+#ifdef RCC_AHB1ENR_USB20TGHSEN
   [STM32H7_MODULE_USB2_OTG] = { &RCC->AHB1ENR, RCC_AHB1ENR_USB2OTGHSEN },
+#endif
+#ifdef RCC_AHB1ENR_USB20TGHSULPIEN
   [STM32H7_MODULE_USB2_OTG_ULPI] = { &RCC->AHB1ENR, RCC_AHB1ENR_USB2OTGHSULPIEN },
+#endif
   [STM32H7_MODULE_SDMMC1] = { &RCC->AHB3ENR, RCC_AHB3ENR_SDMMC1EN },
   [STM32H7_MODULE_SDMMC2] = { &RCC->AHB2ENR, RCC_AHB2ENR_SDMMC2EN },
 };
@@ -205,13 +215,23 @@ static const stm32h7_clk_info stm32h7_clk_low_power[] = {
   [STM32H7_MODULE_USART10] = { NULL, 0 },
 #endif
   [STM32H7_MODULE_RNG] = { &RCC->AHB2LPENR, RCC_AHB2LPENR_RNGLPEN },
+#ifdef RCC_AHB1LPENR_ETH1MACLPEN
   [STM32H7_MODULE_ETH1MAC] = { &RCC->AHB1LPENR, RCC_AHB1LPENR_ETH1MACLPEN },
+#endif
+#ifdef RCC_AHB1LPENR_ETH1TXLPEN
   [STM32H7_MODULE_ETH1TX] = { &RCC->AHB1LPENR, RCC_AHB1LPENR_ETH1TXLPEN },
+#endif
+#ifdef RCC_AHB1LPENR_ETH1RXLPEN
   [STM32H7_MODULE_ETH1RX] = { &RCC->AHB1LPENR, RCC_AHB1LPENR_ETH1RXLPEN },
+#endif
   [STM32H7_MODULE_USB1_OTG] = { &RCC->AHB1LPENR, RCC_AHB1LPENR_USB1OTGHSLPEN },
   [STM32H7_MODULE_USB1_OTG_ULPI] = { &RCC->AHB1LPENR, RCC_AHB1LPENR_USB1OTGHSULPILPEN },
+#ifdef RCC_AHB1LPENR_USB2OTGHSLPEN
   [STM32H7_MODULE_USB2_OTG] = { &RCC->AHB1LPENR, RCC_AHB1LPENR_USB2OTGHSLPEN },
+#endif
+#ifdef RCC_AHB1LPENR_USB2OTGHSULPILPEN
   [STM32H7_MODULE_USB2_OTG_ULPI] = { &RCC->AHB1LPENR, RCC_AHB1LPENR_USB2OTGHSULPILPEN },
+#endif
   [STM32H7_MODULE_SDMMC1] = { &RCC->AHB3LPENR, RCC_AHB3LPENR_SDMMC1LPEN },
   [STM32H7_MODULE_SDMMC2] = { &RCC->AHB2LPENR, RCC_AHB2LPENR_SDMMC2LPEN },
 };
-- 
2.25.1