Project Ideas - Basic RTEMS BSP for Cortex-R5 on Qemu

Sun Apr 17 15:20:20 UTC 2022

On Sun, Apr 17, 2022, 5:17 AM Pavel Pisa <ppisa4lists at pikron.com> wrote:

> Dear Kamlesh,
>
> On Sunday 17 of April 2022 10:19:01 Kamlesh Bharodiya wrote:
> > Thanks for your mail. I have not worked on ZCU102. Though, I'm working
> with
> > R4F currently. Shall I go ahead with the GSoC application? Or should I
> wait
> > for any other mentor to reply ?
>
> I do not feel competent to be main mentor for this project
> and some feedback from people working on RTEMS core
> would be helpfull. But I expect that most are on Easters
> now so the time to submission deadline is relatively tight.
>

The R5 basic BSP is needed by the RTEMS community. If you get through that,
you could look at the Xilinx code for interacting with it.

> I am not sure if somebody else see potential to use RTEMS or Cortex-R5
> integrated into ZCU102. I see it in general but do not see any
> such project on my horizon university work nor company projects
> horizon. I have actually neither project with TMS570LC4357,
> but I have at least HW and it could be nice platform to test
> RTEMS CAN support if it is updated during this year another GSoC
> and interesting platform for LwIP testing... But there is no
> QEMU support and I do not suggest to change your project to this
> direction.
>
> As I have checked, it seems that it is possible to use ZCU102 R5
> somehow with local UART and timer so it makes project initial
> phases as feasible in the GSoC frame. Do you plan project as
> the longer or shorter GSoC variant?
>
> I suggest to apply before submission deadline even if the
> project is not fully clarified before deadline. It will
> be discussed by RTEMS mentors and can be slightly adjusted,
> extended before coding phase to match core team vision.
> Other option is to select another open topic which is on
> the RTEMS project interest list
>
>   https://devel.rtems.org/wiki/Developer/OpenProjects
>
> But if you have already some experience with Cortex-R4
> and see some real application use for your work then
> the goal has reason.
>
> You wrote in your proposal
>
>   Testing R4 BSP on Qemu - but I think that there is no such
>      available target for now
>
> As for the timeline, I suggest to move testing and familiarization
> with RTEMS and QEMU ecosystem into bonding period and start real
> coding with start of GSoC coding period to have something to
> to evaluate and running in the middle
>
>    Testing R4 BSP on Qemu, and few other BSPs on Qemu like STM32 BSP
>    to get familiarize myself with machines on Qemu
>
> Because if you finish work only after the second half then there
> is not enough time for review, clean up, documentation and adjustment
> for mainline submission. Expect two or three round for it and
> this should be real goal of GSoC and real evaluation.
> So I suggest move more coding to the first half and some reserve
> and documention and review process to the second half.
>
> Best wishes,
>
> Pavel
>
> > On Sat, 16 Apr, 2022, 7:41 pm Pavel Pisa, <ppisa4lists at pikron.com>
> wrote:
> > > Dear Kamlesh,
> > >
> > > On Friday 15 of April 2022 06:50:44 Kamlesh Bharodiya wrote:
> > > > I am looking for mentors for my project. How can I connect to
> > > > interested mentors? I have uploaded the draft proposal on GSoC
> tracking
> > > > page.
> > >
> > > I have long time interrest in RTEMS running on TMS570LC4357
> > > which is Arm Cortex-R5F based. I have TMDX570LC43HDK at home
> > > and some smaller boards are at Elktroline.cz.
> > >
> > > As I know, the Cortex-R5 core is already supported
> > > by RTEMS and our TMS570LS3137 BSP has been used
> > > with TMS570LC4357 chips by Frankfurt University
> > >
> > >   https://www.rz.uni-frankfurt.de/65100666/dcs
> > >
> > > Relevant repository
> > >
> > >   https://github.com/jalmito/rtems
> > >
> > > It would worth to get mainline TMS570 BSP compatible with
> > > both chips.
> > >
> > > But back to your project, possibility to run RTEMS on Cortex-R5
> > > architecture in QEMU would be usesfull for testing. My search through
> > > actual QEMU sources confirms Cortex-R support and only in  Cortex-R5
> > > and Cortex-R52 variants and only integration on ZCU102.
> > > But support of Cortex-R5 comprocessor on "big" Xilinx platforms
> > > can be usesfull. I have helped with bought of these boards
> > > years ago but for the team which moved away. But I probably
> > > can find even somebody with HW who could test the code.
> > >
> > > The minimal set of the peripherals supported to make port
> > > usable and living needs to include GIC (generic interrupt controller),
> > > TTC (system timer) and UART (serial port).
> > > Other option is some mailbox based exchange with main Cortex-A CPU.
> > >
> > > Have you some experience with ZCU102?
> > > I have no much idea how difficult the project is...
> > >
> > > I can help as co-mentor, I cannot offer main mentor role
> > > because I have too many running projects.
> > >
> > > I CC to Sebastian Huber, because if I remember well they
> > > have provided support for some Cortex-R5 platform already.
> > >
> > > Best wishes,
> > >
> > >                 Pavel Pisa
> > >     phone:      +420 603531357
> > >     e-mail:     pisa at cmp.felk.cvut.cz
> > >     Department of Control Engineering FEE CVUT
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>
>