[PATCH v2 1/1] bsp/riscv: Work area size based on /memory node in fdt
Daniel Cederman
cederman at gaisler.com
Fri Aug 19 12:36:10 UTC 2022
On 2022-08-19 11:16, Hesham Almatary wrote:
> On Thu, 18 Aug 2022 at 13:55, Daniel Cederman <cederman at gaisler.com> wrote:
>> I missed your comment, but have made the change now. Are there any instructions on how to run the RISCV BSP tests on QEMU or Spike? I could not get it to work. Do I need a special version of QEMU or Spike?
>>
> Thanks! AFAIR, you need to run the "medany" RISC-V variants for QEMU,
> I'd use rtems-tester. No special QEMU version is needed.
Thanks! I had to change "-m 64M -kernel" to "-m 128M -bios" to get it to
run. Got the same result both with and without the patch for
rv64imafd_medany:
Passed: 653
Failed: 16
User Input: 5
Expected Fail: 0
Indeterminate: 0
Benchmark: 3
Timeout: 5
Test too long: 0
Invalid: 0
Wrong Version: 0
Wrong Build: 0
Wrong Tools: 0
Wrong Header: 0
------------------
Total: 682
Failures:
exit03.exe
ttest02.exe
psx12.exe
smpirqs01.exe
sp69.exe
spintrcritical24.exe
spsysinit01.exe
ts-fatal-scheduler-requires-exactly-one-processor.exe
ts-fatal-start-of-mandatory-processor-failed.exe
ts-validation-1.exe
ts-validation-one-cpu-0.exe
minimum.exe
smpstart01.exe
ts-fatal-smp.exe
ts-performance-no-clock-0.exe
ts-validation-intr.exe
User Input:
monitor.exe
termios.exe
top.exe
fileio.exe
capture.exe
Benchmark:
dhrystone.exe
linpack.exe
whetstone.exe
Timeouts:
ts-fatal-start-on-not-online-processor.exe
ts-validation-0.exe
ts-validation-no-clock-0.exe
ts-validation-smp-only-0.exe
ts-validation-timecounter-smp-0.exe
>> On 2022-08-18 10:24, Hesham Almatary wrote:
>>
>> All good, I'd just replace the "end == 0" with "end == NULL" as per my
>> comment above. Also please test on other RISC-V QEMU platforms to make
>> sure nothing got broken.
>>
>> On Wed, 17 Aug 2022 at 14:10, Joel Sherrill <joel at rtems.org> wrote:
>>
>> I'm ok with this if Hesham acks as well.
>>
>> --joel
>>
>> On Wed, Aug 17, 2022 at 6:35 AM Daniel Cederman <cederman at gaisler.com> wrote:
>>
>> Uses the first entry in the /memory node to determine the end of the
>> work area. Falls back on linker symbol if unable to parse the node.
>> ---
>> bsps/riscv/shared/start/bspgetworkarea.c | 144 +++++++++++++++++++++++
>> spec/build/bsps/riscv/riscv/obj.yml | 1 +
>> 2 files changed, 145 insertions(+)
>> create mode 100644 bsps/riscv/shared/start/bspgetworkarea.c
>>
>> diff --git a/bsps/riscv/shared/start/bspgetworkarea.c b/bsps/riscv/shared/start/bspgetworkarea.c
>> new file mode 100644
>> index 0000000000..1fa051d25e
>> --- /dev/null
>> +++ b/bsps/riscv/shared/start/bspgetworkarea.c
>> @@ -0,0 +1,144 @@
>> +/* SPDX-License-Identifier: BSD-2-Clause */
>> +
>> +/**
>> + * @file
>> + *
>> + * @brief BSP specific initialization support routines
>> + *
>> + */
>> +
>> +/*
>> + * COPYRIGHT (c) 1989-2020.
>> + * On-Line Applications Research Corporation (OAR).
>> + * Cobham Gaisler AB.
>> + *
>> + * Redistribution and use in source and binary forms, with or without
>> + * modification, are permitted provided that the following conditions
>> + * are met:
>> + * 1. Redistributions of source code must retain the above copyright
>> + * notice, this list of conditions and the following disclaimer.
>> + * 2. Redistributions in binary form must reproduce the above copyright
>> + * notice, this list of conditions and the following disclaimer in the
>> + * documentation and/or other materials provided with the distribution.
>> + *
>> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
>> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
>> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
>> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
>> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
>> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
>> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
>> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
>> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
>> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
>> + * POSSIBILITY OF SUCH DAMAGE.
>> + */
>> +
>> +#include <bsp.h>
>> +#include <bsp/fdt.h>
>> +
>> +#include <rtems/sysinit.h>
>> +
>> +#include <libfdt.h>
>> +
>> +/*
>> + * These are provided by the linkcmds for ALL of the BSPs which use this file.
>> + */
>> +extern char WorkAreaBase[];
>> +extern char RamEnd[];
>> +
>> +static Memory_Area _Memory_Areas[ 1 ];
>> +
>> +static const char memory_path[] = "/memory";
>> +
>> +static void* get_end_of_memory_from_fdt(void)
>> +{
>> + const void *fdt;
>> + const void *val;
>> + int node;
>> + int parent;
>> + int ac;
>> + int sc;
>> + int len;
>> + uintptr_t start;
>> + uintptr_t size;
>> +
>> + fdt = bsp_fdt_get();
>> +
>> + node = fdt_path_offset_namelen(
>> + fdt,
>> + memory_path,
>> + (int) sizeof(memory_path) - 1
>> + );
>> +
>> + if (node < 0) {
>> + return NULL;
>> + }
>> +
>> + parent = fdt_parent_offset(fdt, node);
>> + if (parent < 0) {
>> + return NULL;
>> + }
>> +
>> + ac = fdt_address_cells(fdt, parent);
>> + if (ac != 1 && ac != 2) {
>> + return NULL;
>> + }
>> +
>> + sc = fdt_size_cells(fdt, parent);
>> + if (sc != 1 && sc != 2) {
>> + return NULL;
>> + }
>> +
>> + if (sc > ac) {
>> + return NULL;
>> + }
>> +
>> + val = fdt_getprop(fdt, node, "reg", &len);
>> + if (len < sc + ac) {
>> + return NULL;
>> + }
>> +
>> + if (ac == 1) {
>> + start = fdt32_to_cpu(((fdt32_t *)val)[0]);
>> + size = fdt32_to_cpu(((fdt32_t *)val)[1]);
>> + }
>> +
>> + if (ac == 2) {
>> + start = fdt64_to_cpu(((fdt64_t *)val)[0]);
>> +
>> + if (sc == 1)
>> + size = fdt32_to_cpu(((fdt32_t *)(val+8))[0]);
>> + else
>> + size = fdt64_to_cpu(((fdt64_t *)val)[1]);
>> + }
>> +
>> + return (void*) (start + size);
>> +}
>> +
>> +static void bsp_memory_initialize( void )
>> +{
>> + void *end;
>> +
>> + /* get end of memory from the "/memory" node in the fdt */
>> + end = get_end_of_memory_from_fdt();
>> + if (end == 0) {
>> + /* fall back to linker symbol if "/memory" node not found or invalid */
>> + end = RamEnd;
>> + }
>> + _Memory_Initialize( &_Memory_Areas[ 0 ], WorkAreaBase, end );
>> +}
>> +
>> +RTEMS_SYSINIT_ITEM(
>> + bsp_memory_initialize,
>> + RTEMS_SYSINIT_MEMORY,
>> + RTEMS_SYSINIT_ORDER_MIDDLE
>> +);
>> +
>> +static const Memory_Information _Memory_Information =
>> + MEMORY_INFORMATION_INITIALIZER( _Memory_Areas );
>> +
>> +const Memory_Information *_Memory_Get( void )
>> +{
>> + return &_Memory_Information;
>> +}
>> diff --git a/spec/build/bsps/riscv/riscv/obj.yml b/spec/build/bsps/riscv/riscv/obj.yml
>> index 5e767be1bb..b2eb467824 100644
>> --- a/spec/build/bsps/riscv/riscv/obj.yml
>> +++ b/spec/build/bsps/riscv/riscv/obj.yml
>> @@ -29,6 +29,7 @@ source:
>> - bsps/riscv/riscv/irq/irq.c
>> - bsps/riscv/riscv/start/bsp_fatal_halt.c
>> - bsps/riscv/riscv/start/bspstart.c
>> +- bsps/riscv/shared/start/bspgetworkarea.c
>> - bsps/shared/cache/nocache.c
>> - bsps/shared/dev/btimer/btimer-cpucounter.c
>> - bsps/shared/dev/getentropy/getentropy-cpucounter.c
>> --
>> 2.34.1
>>
>> _______________________________________________
>> devel mailing list
>> devel at rtems.org
>> http://lists.rtems.org/mailman/listinfo/devel
>>
>> _______________________________________________
>> devel mailing list
>> devel at rtems.org
>> http://lists.rtems.org/mailman/listinfo/devel
>>
>>
>> _______________________________________________
>> devel mailing list
>> devel at rtems.org
>> http://lists.rtems.org/mailman/listinfo/devel
More information about the devel
mailing list