[PATCH rtems v2] bsps/imx: Enable clock of ETH2
Christian MAUDERER
christian.mauderer at embedded-brains.de
Thu Jun 9 07:06:42 UTC 2022
Thanks for the review and the OK to push.
I created a patch for rtems-docs that gives some information about that
(and about how to use the second Ethernet controller) and sent it to the
list.
Am 08.06.22 um 02:49 schrieb Chris Johns:
> Does the BSP doco in the User Manual need updating to mention the clock setting
> and the required FDT?
>
> This code fails silently and so documentation is fine or I think the user should
> be alerted some other way.
>
> Otherwise OK to push :)
>
> Thanks
> Chris
>
> On 7/6/2022 11:05 pm, Christian Mauderer wrote:
>> ---
>> .../include/arm/freescale/imx/imx6ul_ccmreg.h | 152 ++++++++++++++++++
>> bsps/arm/imx/start/bspstart.c | 20 +++
>> spec/build/bsps/arm/imx/bspimx.yml | 1 +
>> 3 files changed, 173 insertions(+)
>> create mode 100644 bsps/arm/imx/include/arm/freescale/imx/imx6ul_ccmreg.h
>>
>> diff --git a/bsps/arm/imx/include/arm/freescale/imx/imx6ul_ccmreg.h b/bsps/arm/imx/include/arm/freescale/imx/imx6ul_ccmreg.h
>> new file mode 100644
>> index 0000000000..e4b597ba32
>> --- /dev/null
>> +++ b/bsps/arm/imx/include/arm/freescale/imx/imx6ul_ccmreg.h
>> @@ -0,0 +1,152 @@
>> +/* SPDX-License-Identifier: BSD-2-Clause */
>> +
>> +/*
>> + * Copyright (C) 2022 embedded brains GmbH
>> + *
>> + * Redistribution and use in source and binary forms, with or without
>> + * modification, are permitted provided that the following conditions
>> + * are met:
>> + * 1. Redistributions of source code must retain the above copyright
>> + * notice, this list of conditions and the following disclaimer.
>> + * 2. Redistributions in binary form must reproduce the above copyright
>> + * notice, this list of conditions and the following disclaimer in the
>> + * documentation and/or other materials provided with the distribution.
>> + *
>> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
>> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
>> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
>> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
>> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
>> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
>> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
>> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
>> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
>> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
>> + * POSSIBILITY OF SUCH DAMAGE.
>> + */
>> +
>> +#ifndef IMX6UL_CCMREG_H
>> +#define IMX6UL_CCMREG_H
>> +
>> +#include <bsp/utility.h>
>> +
>> +typedef struct {
>> + uint32_t ccr;
>> + uint32_t ccdr;
>> + uint32_t csr;
>> + uint32_t ccsr;
>> + uint32_t cacrr;
>> + uint32_t cbcdr;
>> + uint32_t cbcmr;
>> + uint32_t cscmr1;
>> + uint32_t cscmr2;
>> + uint32_t cscdr1;
>> + uint32_t cs1cdr;
>> + uint32_t cs2cdr;
>> + uint32_t cdcdr;
>> + uint32_t chsccdr;
>> + uint32_t cscdr2;
>> + uint32_t cscdr3;
>> + uint32_t reserved_40[2];
>> + uint32_t cdhipr;
>> + uint32_t reserved_4c[2];
>> + uint32_t clpcr;
>> + uint32_t cisr;
>> + uint32_t cimr;
>> + uint32_t ccosr;
>> + uint32_t cgpr;
>> + uint32_t ccgr0;
>> + uint32_t ccgr1;
>> + uint32_t ccgr2;
>> + uint32_t ccgr3;
>> + uint32_t ccgr4;
>> + uint32_t ccgr5;
>> + uint32_t ccgr6;
>> + uint32_t reserved_84[1];
>> + uint32_t cmeor;
>> +} imx6ul_ccm;
>> +
>> +typedef struct {
>> + uint32_t pll_arm;
>> + uint32_t pll_arm_set;
>> + uint32_t pll_arm_clr;
>> + uint32_t pll_arm_tog;
>> + uint32_t pll_usb1;
>> + uint32_t pll_usb1_set;
>> + uint32_t pll_usb1_clr;
>> + uint32_t pll_usb1_tog;
>> + uint32_t pll_usb2;
>> + uint32_t pll_usb2_set;
>> + uint32_t pll_usb2_clr;
>> + uint32_t pll_usb2_tog;
>> + uint32_t pll_sys;
>> + uint32_t pll_sys_set;
>> + uint32_t pll_sys_clr;
>> + uint32_t pll_sys_tog;
>> + uint32_t pll_sys_ss;
>> + uint32_t reserved_44[3];
>> + uint32_t pll_sys_num;
>> + uint32_t reserved_54[3];
>> + uint32_t pll_sys_denom;
>> + uint32_t reserved_64[3];
>> + uint32_t pll_audio;
>> + uint32_t pll_audio_set;
>> + uint32_t pll_audio_clr;
>> + uint32_t pll_audio_tog;
>> + uint32_t pll_audio_num;
>> + uint32_t reserved_84[3];
>> + uint32_t pll_audio_denom;
>> + uint32_t reserved_94[3];
>> + uint32_t pll_video;
>> + uint32_t pll_video_set;
>> + uint32_t pll_video_clr;
>> + uint32_t pll_video_tog;
>> + uint32_t pll_video_num;
>> + uint32_t reserved_b4[3];
>> + uint32_t pll_video_denom;
>> + uint32_t reserved_c4[7];
>> + uint32_t pll_enet;
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_LOCK BSP_BIT32(31)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN BSP_BIT32(21)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_ENET2_125M_EN BSP_BIT32(20)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_ENABLE_125M BSP_BIT32(19)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN BSP_BIT32(18)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_BYPASS BSP_BIT32(16)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC(val) BSP_FLD32(val, 14, 15)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_GET(val) BSP_FLD32GET(val, 14, 15)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC_SET(val) BSP_FLD32SET(val, 14, 15)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_ENET1_125M_EN BSP_BIT32(13)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_POWERDOWN BSP_BIT32(12)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_ENET1_DIV_SELECT(val) BSP_FLD32(val, 3, 2)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_ENET1_DIV_SELECT_GET(val) BSP_FLD32GET(val, 3, 2)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_ENET1_DIV_SELECT_SET(val) BSP_FLD32SET(val, 3, 2)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_ENET0_DIV_SELECT(val) BSP_FLD32(val, 0, 1)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_ENET0_DIV_SELECT_GET(val) BSP_FLD32GET(val, 0, 1)
>> +#define IMX6UL_CCM_ANALOG_PLL_ENET_ENET0_DIV_SELECT_SET(val) BSP_FLD32SET(val, 0, 1)
>> + uint32_t pll_enet_set;
>> + uint32_t pll_enet_clr;
>> + uint32_t pll_enet_tog;
>> + uint32_t pfd_480;
>> + uint32_t pfd_480_set;
>> + uint32_t pfd_480_clr;
>> + uint32_t pfd_480_tog;
>> + uint32_t pfd_528;
>> + uint32_t pfd_528_set;
>> + uint32_t pfd_528_clr;
>> + uint32_t pfd_528_tog;
>> + uint32_t reserved_110[16];
>> + uint32_t misc0;
>> + uint32_t misc0_set;
>> + uint32_t misc0_clr;
>> + uint32_t misc0_tog;
>> + uint32_t misc1;
>> + uint32_t misc1_set;
>> + uint32_t misc1_clr;
>> + uint32_t misc1_tog;
>> + uint32_t misc2;
>> + uint32_t misc2_set;
>> + uint32_t misc2_clr;
>> + uint32_t misc2_tog;
>> +} imx6ul_ccm_analog;
>> +
>> +#endif /* IMX6UL_CCMREG_H */
>> diff --git a/bsps/arm/imx/start/bspstart.c b/bsps/arm/imx/start/bspstart.c
>> index 04d48d1558..552935ee69 100644
>> --- a/bsps/arm/imx/start/bspstart.c
>> +++ b/bsps/arm/imx/start/bspstart.c
>> @@ -14,6 +14,7 @@
>> #include <bsp/linker-symbols.h>
>> #include <dev/clock/arm-generic-timer.h>
>> #include <libcpu/arm-cp15.h>
>> +#include <arm/freescale/imx/imx6ul_ccmreg.h>
>>
>> #include <libfdt.h>
>>
>> @@ -161,6 +162,24 @@ static void imx_find_gic(const void *fdt)
>> #endif
>> }
>>
>> +static void imx_ccm_enable_eth2_clk(void)
>> +{
>> + const void *fdt = bsp_fdt_get();
>> +
>> + if (imx_is_imx6(fdt)) {
>> + int node;
>> + volatile imx6ul_ccm_analog *ccm_analog = NULL;
>> +
>> + node = fdt_node_offset_by_compatible(fdt, -1, "fsl,imx6ul-anatop");
>> + if (node >= 0) {
>> + ccm_analog = imx_get_reg_of_node(fdt, node);
>> + }
>> + if (ccm_analog != NULL) {
>> + ccm_analog->pll_enet_set = IMX6UL_CCM_ANALOG_PLL_ENET_ENET2_125M_EN;
>> + }
>> + }
>> +}
>> +
>> void bsp_start(void)
>> {
>> imx_find_gic(bsp_fdt_get());
>> @@ -169,4 +188,5 @@ void bsp_start(void)
>> bsp_section_nocacheheap_begin,
>> (uintptr_t) bsp_section_nocacheheap_size
>> );
>> + imx_ccm_enable_eth2_clk();
>> }
>> diff --git a/spec/build/bsps/arm/imx/bspimx.yml b/spec/build/bsps/arm/imx/bspimx.yml
>> index 24e56a499f..6ff2093f7e 100644
>> --- a/spec/build/bsps/arm/imx/bspimx.yml
>> +++ b/spec/build/bsps/arm/imx/bspimx.yml
>> @@ -23,6 +23,7 @@ install:
>> - bsps/arm/imx/include/arm/freescale/imx/imx_srcreg.h
>> - bsps/arm/imx/include/arm/freescale/imx/imx_uartreg.h
>> - bsps/arm/imx/include/arm/freescale/imx/imx_wdogreg.h
>> + - bsps/arm/imx/include/arm/freescale/imx/imx6ul_ccmreg.h
>> - bsps/arm/include/arm/freescale/imx/imx_iomuxreg.h
>> - bsps/arm/include/arm/freescale/imx/imx_iomuxvar.h
>> - destination: ${BSP_INCLUDEDIR}/bsp
--
--------------------------------------------
embedded brains GmbH
Herr Christian MAUDERER
Dornierstr. 4
82178 Puchheim
Germany
email: christian.mauderer at embedded-brains.de
phone: +49-89-18 94 741 - 18
fax: +49-89-18 94 741 - 08
Registergericht: Amtsgericht München
Registernummer: HRB 157899
Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
Unsere Datenschutzerklärung finden Sie hier:
https://embedded-brains.de/datenschutzerklaerung/
More information about the devel
mailing list