[PATCH v2] zynqmp: Add support for the CFC-400X
Padmarao.Begari at microchip.com
Padmarao.Begari at microchip.com
Fri Nov 11 04:32:51 UTC 2022
Hi Kinsey,
> On Thu, 2022-11-10 at 07:55 -0600, Kinsey Moore wrote:
>
> Hi Padmarao,
> More compatibles can be added later if necessary to both the device
> tree in RTEMS and the driver in RTEMS-LibBSD, but I don't see the
> need for either at the moment since the ethernet portion of the
> device tree is intended to be used with RTEMS-LibBSD directly. As far
> as the driver in 6-freebsd-12 is concerned, all compatibles are
> currently equivalent and it already supports "cdns,macb" if a BSP
> chooses to use that compatible. This may change when we upgrade to
> the FreeBSD 13 code since the driver has gained more advanced support
> for differentiating among compatibles and hardware quirks, but the
> list of supported compatibles will only expand.
>
Ok, Makes sense to me.
Regards
Padmarao
> Kinsey
>
> On Thu, Nov 10, 2022 at 6:50 AM <Padmarao.Begari at microchip.com>
> wrote:
> > Hi Kinsey,
> >
> > The ethernet compatible "cdns,gem" is mentioned in the device tree,
> > even I used same for PolarFire SoC BSP but later realised that
> > common
> > compatible for the candence GEM is "cdns,macb" used in U-Boot and
> > Linux.
> >
> > Can we go with compatible "cdns,gem"? or will we update with
> > "cdns,macb" later?
> >
> > Regards
> > Padmarao
> > > + ethernet at ff0b0000 {
> > > + compatible = "cdns,gem";
> > > + status = "okay";
> > > + interrupt-parent = <0x01>;
> > > + interrupts = <0x00 0x39 0x04>;
> > > + reg = <0x00 0xff0b0000 0x00 0x1000>;
> > > + phy-mode = "sgmii";
> > > + };
> >
> >
> > > On Tue, 2022-11-08 at 15:56 -0600, Kinsey Moore wrote:
> > >
> > > This adds a BSP variant for the ZynqMP BSP family to support the
> > > Innoflight CFC-400X platform. To properly support the CFC-400X,
> > > device
> > > trees were added to the ZynqMP platform due to both the optional
> > > management interface as well as alternate physical configuration
> > of
> > > the
> > > ethernet interfaces.
> > > ---
> > > bsps/aarch64/xilinx-zynqmp/console/console.c | 163
> > > +++++++++++++++++-
> > > bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c | 51 ++++++
> > > bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts | 110 ++++++++++++
> > > bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c | 124
> > +++++++++++++
> > > bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts | 94 ++++++++++
> > > bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c | 97 +++++++++++
> > > bsps/aarch64/xilinx-zynqmp/include/bsp.h | 15 ++
> > > .../aarch64/xilinx-zynqmp/start/bspstartmmu.c | 4 +
> > > .../aarch64/xilinx-zynqmp/bspcfc400xlp64.yml | 21 +++
> > > .../aarch64/xilinx-zynqmp/bspqemuilp32.yml | 2 +
> > > .../aarch64/xilinx-zynqmp/bspqemulp64.yml | 2 +
> > > .../aarch64/xilinx-zynqmp/bspzu3egilp32.yml | 2 +
> > > .../aarch64/xilinx-zynqmp/bspzu3eglp64.yml | 2 +
> > > spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml | 1 +
> > > .../aarch64/xilinx-zynqmp/objfdtcfc400x.yml | 14 ++
> > > .../aarch64/xilinx-zynqmp/objfdtzynqmp.yml | 14 ++
> > > .../bsps/aarch64/xilinx-zynqmp/optloadoff.yml | 1 +
> > > .../bsps/aarch64/xilinx-zynqmp/optramori.yml | 1 +
> > > spec/build/cpukit/optsmp.yml | 1 +
> > > 19 files changed, 718 insertions(+), 1 deletion(-)
> > > create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c
> > > create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts
> > > create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c
> > > create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts
> > > create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c
> > > create mode 100644 spec/build/bsps/aarch64/xilinx-
> > > zynqmp/bspcfc400xlp64.yml
> > > create mode 100644 spec/build/bsps/aarch64/xilinx-
> > > zynqmp/objfdtcfc400x.yml
> > > create mode 100644 spec/build/bsps/aarch64/xilinx-
> > > zynqmp/objfdtzynqmp.yml
> > >
> > > diff --git a/bsps/aarch64/xilinx-zynqmp/console/console.c
> > > b/bsps/aarch64/xilinx-zynqmp/console/console.c
> > > index d1948f1a0c..d546db8535 100644
> > > --- a/bsps/aarch64/xilinx-zynqmp/console/console.c
> > > +++ b/bsps/aarch64/xilinx-zynqmp/console/console.c
> > > @@ -9,7 +9,7 @@
> > > */
> > >
> > > /*
> > > - * Copyright (C) 2020 On-Line Applications Research Corporation
> > > (OAR)
> > > + * Copyright (C) 2022 On-Line Applications Research Corporation
> > > (OAR)
> > > * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
> > > *
> > > * Redistribution and use in source and binary forms, with or
> > > without
> > > @@ -36,13 +36,165 @@
> > >
> > > #include <rtems/console.h>
> > > #include <rtems/bspIo.h>
> > > +#include <rtems/endian.h>
> > > +#include <rtems/rtems-fdt.h>
> > > #include <rtems/sysinit.h>
> > >
> > > +#include <bsp/aarch64-mmu.h>
> > > +#include <bsp/fdt.h>
> > > #include <bsp/irq.h>
> > > +
> > > #include <dev/serial/zynq-uart.h>
> > >
> > > #include <bspopts.h>
> > >
> > > +#include <libchip/ns16550.h>
> > > +
> > > +uint32_t mgmt_uart_reg_shift = 0;
> > > +static uint8_t get_register(uintptr_t addr, uint8_t i)
> > > +{
> > > + volatile uint8_t *reg = (uint8_t *) addr;
> > > +
> > > + i <<= mgmt_uart_reg_shift;
> > > + return reg [i];
> > > +}
> > > +
> > > +static void set_register(uintptr_t addr, uint8_t i, uint8_t val)
> > > +{
> > > + volatile uint8_t *reg = (uint8_t *) addr;
> > > +
> > > + i <<= mgmt_uart_reg_shift;
> > > + reg [i] = val;
> > > +}
> > > +
> > > +static ns16550_context zynqmp_mgmt_uart_context = {
> > > + .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("Management
> > UART
> > > 0"),
> > > + .get_reg = get_register,
> > > + .set_reg = set_register,
> > > + .port = 0,
> > > + .irq = 0,
> > > + .clock = 0,
> > > + .initial_baud = 0,
> > > +};
> > > +
> > > +__attribute__ ((weak)) void
> > > zynqmp_configure_management_console(rtems_termios_device_context
> > > *base)
> > > +{
> > > + /* This SLIP-encoded watchdog command sets timeouts to
> > 0xFFFFFFFF
> > > seconds. */
> > > + const char mgmt_watchdog_cmd[] =
> > > +
> > "\xc0\xda\x00\x00\xff\xff\xff\xff\xff\x00\xff\xff\xff\xffM#\xc0"
> > > ;
> > > +
> > > + /* Send the system watchdog configuration command */
> > > + for (int i = 0; i < sizeof(mgmt_watchdog_cmd); i++) {
> > > + ns16550_polled_putchar(base, mgmt_watchdog_cmd[i]);
> > > + }
> > > +}
> > > +
> > > +static void zynqmp_management_console_init(void)
> > > +{
> > > + /* Find the management console in the device tree */
> > > + rtems_fdt_handle fdt_handle;
> > > + const uint32_t *prop;
> > > + uint32_t outprop[4];
> > > + int proplen;
> > > + int node;
> > > +
> > > + rtems_fdt_init_handle(&fdt_handle);
> > > + rtems_fdt_register(bsp_fdt_get(), &fdt_handle);
> > > + const char *alias = rtems_fdt_get_alias(&fdt_handle,
> > "mgmtport");
> > > + if (alias == NULL) {
> > > + rtems_fdt_release_handle(&fdt_handle);
> > > + return;
> > > + }
> > > + node = rtems_fdt_path_offset(&fdt_handle, alias);
> > > +
> > > + prop = rtems_fdt_getprop(&fdt_handle, node, "clock-frequency",
> > > &proplen);
> > > + if ( prop == NULL || proplen != 4 ) {
> > > + rtems_fdt_release_handle(&fdt_handle);
> > > + zynqmp_mgmt_uart_context.port = 0;
> > > + return;
> > > + }
> > > + outprop[0] = rtems_uint32_from_big_endian((const uint8_t *)
> > > &prop[0]);
> > > + zynqmp_mgmt_uart_context.clock = outprop[0];
> > > +
> > > + prop = rtems_fdt_getprop(&fdt_handle, node, "current-speed",
> > > &proplen);
> > > + if ( prop == NULL || proplen != 4 ) {
> > > + rtems_fdt_release_handle(&fdt_handle);
> > > + zynqmp_mgmt_uart_context.port = 0;
> > > + return;
> > > + }
> > > + outprop[0] = rtems_uint32_from_big_endian((const uint8_t *)
> > > &prop[0]);
> > > + zynqmp_mgmt_uart_context.initial_baud = outprop[0];
> > > +
> > > + prop = rtems_fdt_getprop(&fdt_handle, node, "interrupts",
> > > &proplen);
> > > + if ( prop == NULL || proplen != 12 ) {
> > > + rtems_fdt_release_handle(&fdt_handle);
> > > + zynqmp_mgmt_uart_context.port = 0;
> > > + return;
> > > + }
> > > + outprop[0] = rtems_uint32_from_big_endian((const uint8_t *)
> > > &prop[0]);
> > > + outprop[1] = rtems_uint32_from_big_endian((const uint8_t *)
> > > &prop[1]);
> > > + outprop[2] = rtems_uint32_from_big_endian((const uint8_t *)
> > > &prop[2]);
> > > + /* proplen is in bytes, interrupt mapping expects a length in
> > 32-
> > > bit cells */
> > > + zynqmp_mgmt_uart_context.irq = bsp_fdt_map_intr(outprop,
> > proplen /
> > > 4);
> > > + if ( zynqmp_mgmt_uart_context.irq == 0 ) {
> > > + rtems_fdt_release_handle(&fdt_handle);
> > > + zynqmp_mgmt_uart_context.port = 0;
> > > + return;
> > > + }
> > > +
> > > + prop = rtems_fdt_getprop(&fdt_handle, node, "reg", &proplen);
> > > + if ( prop == NULL || proplen != 16 ) {
> > > + rtems_fdt_release_handle(&fdt_handle);
> > > + zynqmp_mgmt_uart_context.port = 0;
> > > + return;
> > > + }
> > > + outprop[0] = rtems_uint32_from_big_endian((const uint8_t *)
> > > &prop[0]);
> > > + outprop[1] = rtems_uint32_from_big_endian((const uint8_t *)
> > > &prop[1]);
> > > + outprop[2] = rtems_uint32_from_big_endian((const uint8_t *)
> > > &prop[2]);
> > > + outprop[3] = rtems_uint32_from_big_endian((const uint8_t *)
> > > &prop[3]);
> > > + zynqmp_mgmt_uart_context.port = ( ( (uint64_t) outprop[0] ) <<
> > 32
> > > ) | outprop[1];
> > > + uintptr_t uart_base = zynqmp_mgmt_uart_context.port;
> > > + size_t uart_size = ( ( (uint64_t) outprop[2] ) << 32 ) |
> > > outprop[3];
> > > +
> > > + rtems_status_code sc = aarch64_mmu_map( uart_base,
> > > + uart_size,
> > > + AARCH64_MMU_DEVICE);
> > > + if ( sc != RTEMS_SUCCESSFUL ) {
> > > + zynqmp_mgmt_uart_context.port = 0;
> > > + return;
> > > + }
> > > +
> > > + prop = rtems_fdt_getprop(&fdt_handle, node, "reg-offset",
> > > &proplen);
> > > + if ( prop == NULL || proplen != 4 ) {
> > > + rtems_fdt_release_handle(&fdt_handle);
> > > + zynqmp_mgmt_uart_context.port = 0;
> > > + return;
> > > + }
> > > + outprop[0] = rtems_uint32_from_big_endian((const uint8_t *)
> > > &prop[0]);
> > > + zynqmp_mgmt_uart_context.port += outprop[0];
> > > +
> > > + prop = rtems_fdt_getprop(&fdt_handle, node, "reg-shift",
> > > &proplen);
> > > + if ( prop == NULL || proplen != 4 ) {
> > > + rtems_fdt_release_handle(&fdt_handle);
> > > + zynqmp_mgmt_uart_context.port = 0;
> > > + return;
> > > + }
> > > + outprop[0] = rtems_uint32_from_big_endian((const uint8_t *)
> > > &prop[0]);
> > > + mgmt_uart_reg_shift = outprop[0];
> > > +
> > > + rtems_fdt_release_handle(&fdt_handle);
> > > +
> > > + ns16550_probe(&zynqmp_mgmt_uart_context.base);
> > > +
> > > +
> > zynqmp_configure_management_console(&zynqmp_mgmt_uart_context.base
> > > );
> > > +}
> > > +
> > > +RTEMS_SYSINIT_ITEM(
> > > + zynqmp_management_console_init,
> > > + RTEMS_SYSINIT_BSP_START,
> > > + RTEMS_SYSINIT_ORDER_FIRST
> > > +);
> > > +
> > > static zynq_uart_context zynqmp_uart_instances[2] = {
> > > {
> > > .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART
> > 0"
> > > ),
> > > @@ -81,6 +233,15 @@ rtems_status_code console_initialize(
> > > }
> > > }
> > >
> > > + if ( zynqmp_mgmt_uart_context.port != 0 ) {
> > > + rtems_termios_device_install(
> > > + "/dev/ttyMGMT0",
> > > + &ns16550_handler_polled,
> > > + NULL,
> > > + &zynqmp_mgmt_uart_context.base
> > > + );
> > > + }
> > > +
> > > return RTEMS_SUCCESSFUL;
> > > }
> > >
> > > diff --git a/bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c
> > > b/bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c
> > > new file mode 100644
> > > index 0000000000..0748639256
> > > --- /dev/null
> > > +++ b/bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c
> > > @@ -0,0 +1,51 @@
> > > +/* SPDX-License-Identifier: BSD-2-Clause */
> > > +
> > > +/**
> > > + * @file
> > > + *
> > > + * @ingroup RTEMSBSPsAArch64XilinxZynqMP
> > > + *
> > > + * @brief This source file contains the implementatin of
> > > bsp_fdt_get().
> > > + */
> > > +
> > > +/*
> > > + * Copyright (C) 2022 On-Line Applications Research Corporation
> > > (OAR)
> > > + * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
> > > + *
> > > + * Redistribution and use in source and binary forms, with or
> > > without
> > > + * modification, are permitted provided that the following
> > > conditions
> > > + * are met:
> > > + * 1. Redistributions of source code must retain the above
> > copyright
> > > + * notice, this list of conditions and the following
> > disclaimer.
> > > + * 2. Redistributions in binary form must reproduce the above
> > > copyright
> > > + * notice, this list of conditions and the following
> > disclaimer
> > > in the
> > > + * documentation and/or other materials provided with the
> > > distribution.
> > > + *
> > > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
> > > CONTRIBUTORS "AS IS"
> > > + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> > LIMITED
> > > TO, THE
> > > + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
> > > PARTICULAR PURPOSE
> > > + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
> > > CONTRIBUTORS BE
> > > + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
> > EXEMPLARY,
> > > OR
> > > + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
> > PROCUREMENT
> > > OF
> > > + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
> > OR
> > > BUSINESS
> > > + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
> > > WHETHER IN
> > > + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
> > > OTHERWISE)
> > > + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
> > > ADVISED OF THE
> > > + * POSSIBILITY OF SUCH DAMAGE.
> > > + */
> > > +
> > > +#include <bsp.h>
> > > +#include <bsp/fdt.h>
> > > +
> > > +const void *bsp_fdt_get(void)
> > > +{
> > > + return zynqmp_dtb;
> > > +}
> > > +
> > > +uint32_t bsp_fdt_map_intr(const uint32_t *intr, size_t icells)
> > > +{
> > > + if (icells != 3) {
> > > + return 0;
> > > + }
> > > + return (intr[0] == 0 ? 32 : 16) + intr[1];
> > > +}
> > > diff --git a/bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts
> > > b/bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts
> > > new file mode 100644
> > > index 0000000000..763a668a5c
> > > --- /dev/null
> > > +++ b/bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts
> > > @@ -0,0 +1,110 @@
> > > +/* SPDX-License-Identifier: BSD-2-Clause */
> > > +
> > > +/**
> > > + * @file
> > > + *
> > > + * @ingroup RTEMSBSPsAArch64XilinxZynqMP
> > > + *
> > > + * @brief This file provides the CFC-400X device tree
> > > + */
> > > +
> > > +/*
> > > + * Copyright (C) 2022 On-Line Applications Research Corporation
> > > (OAR)
> > > + * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
> > > + *
> > > + * Redistribution and use in source and binary forms, with or
> > > without
> > > + * modification, are permitted provided that the following
> > > conditions
> > > + * are met:
> > > + * 1. Redistributions of source code must retain the above
> > copyright
> > > + * notice, this list of conditions and the following
> > disclaimer.
> > > + * 2. Redistributions in binary form must reproduce the above
> > > copyright
> > > + * notice, this list of conditions and the following
> > disclaimer
> > > in the
> > > + * documentation and/or other materials provided with the
> > > distribution.
> > > + *
> > > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
> > > CONTRIBUTORS "AS IS"
> > > + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> > LIMITED
> > > TO, THE
> > > + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
> > > PARTICULAR PURPOSE
> > > + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
> > > CONTRIBUTORS BE
> > > + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
> > EXEMPLARY,
> > > OR
> > > + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
> > PROCUREMENT
> > > OF
> > > + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
> > OR
> > > BUSINESS
> > > + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
> > > WHETHER IN
> > > + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
> > > OTHERWISE)
> > > + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
> > > ADVISED OF THE
> > > + * POSSIBILITY OF SUCH DAMAGE.
> > > + */
> > > +
> > > +/dts-v1/;
> > > +
> > > +/ {
> > > + #address-cells = <0x02>;
> > > + #size-cells = <0x02>;
> > > +
> > > + amba {
> > > + compatible = "simple-bus";
> > > + #address-cells = <0x02>;
> > > + #size-cells = <0x02>;
> > > + ranges;
> > > +
> > > + interrupt-controller at f9010000 {
> > > + compatible = "arm,gic-400";
> > > + #address-cells = <0x02>;
> > > + #interrupt-cells = <0x03>;
> > > + reg = <0x00 0xf9010000 0x00 0x10000>;
> > > + interrupt-controller;
> > > + phandle = <0x01>;
> > > + };
> > > +
> > > + ethernet at ff0b0000 {
> > > + compatible = "cdns,gem";
> > > + status = "okay";
> > > + interrupt-parent = <0x01>;
> > > + interrupts = <0x00 0x39 0x04>;
> > > + reg = <0x00 0xff0b0000 0x00 0x1000>;
> > > + phy-mode = "sgmii";
> > > + };
> > > +
> > > + ethernet at ff0c0000 {
> > > + compatible = "cdns,gem";
> > > + status = "okay";
> > > + interrupt-parent = <0x01>;
> > > + interrupts = <0x00 0x3b 0x04>;
> > > + reg = <0x00 0xff0c0000 0x00 0x1000>;
> > > + phy-mode = "sgmii";
> > > + };
> > > +
> > > + ethernet at ff0d0000 {
> > > + compatible = "cdns,gem";
> > > + status = "okay";
> > > + interrupt-parent = <0x01>;
> > > + interrupts = <0x00 0x3d 0x04>;
> > > + reg = <0x00 0xff0d0000 0x00 0x1000>;
> > > + phy-mode = "sgmii";
> > > + };
> > > +
> > > + ethernet at ff0e0000 {
> > > + compatible = "cdns,gem";
> > > + status = "okay";
> > > + interrupt-parent = <0x01>;
> > > + interrupts = <0x00 0x3f 0x04>;
> > > + reg = <0x00 0xff0e0000 0x00 0x1000>;
> > > + phy-mode = "sgmii";
> > > + };
> > > +
> > > + serial at 800a0000 {
> > > + clock-frequency = <0x189c000>;
> > > + compatible = "ns16550a";
> > > + current-speed = <0x1c200>;
> > > + device_type = "serial";
> > > + interrupt-parent = <0x01>;
> > > + interrupts = <0x00 0x6e 0x04>;
> > > + reg = <0x00 0x800a0000 0x00 0x10000>;
> > > + reg-offset = <0x1000>;
> > > + reg-shift = <0x02>;
> > > + };
> > > + };
> > > +
> > > + aliases {
> > > + mgmtport = "/amba/serial at 800a0000";
> > > + };
> > > +};
> > > diff --git a/bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c
> > > b/bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c
> > > new file mode 100644
> > > index 0000000000..2d0078678e
> > > --- /dev/null
> > > +++ b/bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c
> > > @@ -0,0 +1,124 @@
> > > +unsigned char zynqmp_dtb[] = {
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> > > +};
> > > +unsigned int zynqmp_dtb_len = 1443;
> > > diff --git a/bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts
> > > b/bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts
> > > new file mode 100644
> > > index 0000000000..65c7dcbba8
> > > --- /dev/null
> > > +++ b/bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts
> > > @@ -0,0 +1,94 @@
> > > +/* SPDX-License-Identifier: BSD-2-Clause */
> > > +
> > > +/**
> > > + * @file
> > > + *
> > > + * @ingroup RTEMSBSPsAArch64XilinxZynqMP
> > > + *
> > > + * @brief This file provides the base ZynqMP device tree
> > > + */
> > > +
> > > +/*
> > > + * Copyright (C) 2022 On-Line Applications Research Corporation
> > > (OAR)
> > > + * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
> > > + *
> > > + * Redistribution and use in source and binary forms, with or
> > > without
> > > + * modification, are permitted provided that the following
> > > conditions
> > > + * are met:
> > > + * 1. Redistributions of source code must retain the above
> > copyright
> > > + * notice, this list of conditions and the following
> > disclaimer.
> > > + * 2. Redistributions in binary form must reproduce the above
> > > copyright
> > > + * notice, this list of conditions and the following
> > disclaimer
> > > in the
> > > + * documentation and/or other materials provided with the
> > > distribution.
> > > + *
> > > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
> > > CONTRIBUTORS "AS IS"
> > > + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> > LIMITED
> > > TO, THE
> > > + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
> > > PARTICULAR PURPOSE
> > > + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
> > > CONTRIBUTORS BE
> > > + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
> > EXEMPLARY,
> > > OR
> > > + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
> > PROCUREMENT
> > > OF
> > > + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
> > OR
> > > BUSINESS
> > > + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
> > > WHETHER IN
> > > + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
> > > OTHERWISE)
> > > + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
> > > ADVISED OF THE
> > > + * POSSIBILITY OF SUCH DAMAGE.
> > > + */
> > > +
> > > +/dts-v1/;
> > > +
> > > +/ {
> > > + #address-cells = <0x02>;
> > > + #size-cells = <0x02>;
> > > +
> > > + amba {
> > > + compatible = "simple-bus";
> > > + #address-cells = <0x02>;
> > > + #size-cells = <0x02>;
> > > + ranges;
> > > +
> > > + interrupt-controller at f9010000 {
> > > + compatible = "arm,gic-400";
> > > + #address-cells = <0x02>;
> > > + #interrupt-cells = <0x03>;
> > > + reg = <0x00 0xf9010000 0x00 0x10000>;
> > > + interrupt-controller;
> > > + phandle = <0x01>;
> > > + };
> > > +
> > > + ethernet at ff0b0000 {
> > > + compatible = "cdns,gem";
> > > + status = "okay";
> > > + interrupt-parent = <0x01>;
> > > + interrupts = <0x00 0x39 0x04>;
> > > + reg = <0x00 0xff0b0000 0x00 0x1000>;
> > > + phy-mode = "sgmii";
> > > + };
> > > +
> > > + ethernet at ff0c0000 {
> > > + compatible = "cdns,gem";
> > > + status = "okay";
> > > + interrupt-parent = <0x01>;
> > > + interrupts = <0x00 0x3b 0x04>;
> > > + reg = <0x00 0xff0c0000 0x00 0x1000>;
> > > + phy-mode = "sgmii";
> > > + };
> > > +
> > > + ethernet at ff0d0000 {
> > > + compatible = "cdns,gem";
> > > + status = "okay";
> > > + interrupt-parent = <0x01>;
> > > + interrupts = <0x00 0x3d 0x04>;
> > > + reg = <0x00 0xff0d0000 0x00 0x1000>;
> > > + phy-mode = "sgmii";
> > > + };
> > > +
> > > + ethernet at ff0e0000 {
> > > + compatible = "cdns,gem";
> > > + status = "okay";
> > > + interrupt-parent = <0x01>;
> > > + interrupts = <0x00 0x3f 0x04>;
> > > + reg = <0x00 0xff0e0000 0x00 0x1000>;
> > > + phy-mode = "sgmii";
> > > + };
> > > + };
> > > +};
> > > diff --git a/bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c
> > > b/bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c
> > > new file mode 100644
> > > index 0000000000..955bc5f154
> > > --- /dev/null
> > > +++ b/bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c
> > > @@ -0,0 +1,97 @@
> > > +unsigned char zynqmp_dtb[] = {
> > > + 0xd0, 0x0d, 0xfe, 0xed, 0x00, 0x00, 0x04, 0x5f, 0x00, 0x00,
> > 0x00,
> > > 0x38,
> > > + 0x00, 0x00, 0x03, 0xd4, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00,
> > 0x00,
> > > 0x11,
> > > + 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x8b,
> > > + 0x00, 0x00, 0x03, 0x9c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x00,
> > > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x01,
> > > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
> > 0x00,
> > > 0x04,
> > > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
> > 0x00,
> > > 0x03,
> > > + 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00,
> > 0x00,
> > > 0x02,
> > > + 0x00, 0x00, 0x00, 0x01, 0x61, 0x6d, 0x62, 0x61, 0x00, 0x00,
> > 0x00,
> > > 0x00,
> > > + 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0b, 0x00, 0x00,
> > 0x00,
> > > 0x1b,
> > > + 0x73, 0x69, 0x6d, 0x70, 0x6c, 0x65, 0x2d, 0x62, 0x75, 0x73,
> > 0x00,
> > > 0x00,
> > > + 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00,
> > 0x00,
> > > 0x00,
> > > + 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
> > 0x00,
> > > 0x04,
> > > + 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
> > 0x00,
> > > 0x03,
> > > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x26, 0x00, 0x00,
> > 0x00,
> > > 0x01,
> > > + 0x69, 0x6e, 0x74, 0x65, 0x72, 0x72, 0x75, 0x70, 0x74, 0x2d,
> > 0x63,
> > > 0x6f,
> > > + 0x6e, 0x74, 0x72, 0x6f, 0x6c, 0x6c, 0x65, 0x72, 0x40, 0x66,
> > 0x39,
> > > 0x30,
> > > + 0x31, 0x30, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x03,
> > > + 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x1b, 0x61, 0x72,
> > 0x6d,
> > > 0x2c,
> > > + 0x67, 0x69, 0x63, 0x2d, 0x34, 0x30, 0x30, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x03,
> > > + 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x02,
> > > + 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00,
> > 0x00,
> > > 0x2d,
> > > + 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
> > 0x00,
> > > 0x10,
> > > + 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0xf9, 0x01,
> > 0x00,
> > > 0x00,
> > > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x03,
> > > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x42, 0x00, 0x00,
> > 0x00,
> > > 0x03,
> > > + 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x57, 0x00, 0x00,
> > 0x00,
> > > 0x01,
> > > + 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x65, 0x74,
> > 0x68,
> > > 0x65,
> > > + 0x72, 0x6e, 0x65, 0x74, 0x40, 0x66, 0x66, 0x30, 0x62, 0x30,
> > 0x30,
> > > 0x30,
> > > + 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
> > 0x00,
> > > 0x09,
> > > + 0x00, 0x00, 0x00, 0x1b, 0x63, 0x64, 0x6e, 0x73, 0x2c, 0x67,
> > 0x65,
> > > 0x6d,
> > > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
> > 0x00,
> > > 0x05,
> > > + 0x00, 0x00, 0x00, 0x5f, 0x6f, 0x6b, 0x61, 0x79, 0x00, 0x00,
> > 0x00,
> > > 0x00,
> > > + 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00,
> > 0x00,
> > > 0x66,
> > > + 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
> > 0x00,
> > > 0x0c,
> > > + 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x39,
> > > + 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
> > 0x00,
> > > 0x10,
> > > + 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0b,
> > 0x00,
> > > 0x00,
> > > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x03,
> > > + 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x82, 0x73, 0x67,
> > 0x6d,
> > > 0x69,
> > > + 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
> > 0x00,
> > > 0x01,
> > > + 0x65, 0x74, 0x68, 0x65, 0x72, 0x6e, 0x65, 0x74, 0x40, 0x66,
> > 0x66,
> > > 0x30,
> > > + 0x63, 0x30, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x03,
> > > + 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x1b, 0x63, 0x64,
> > 0x6e,
> > > 0x73,
> > > + 0x2c, 0x67, 0x65, 0x6d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x03,
> > > + 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x5f, 0x6f, 0x6b,
> > 0x61,
> > > 0x79,
> > > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
> > 0x00,
> > > 0x04,
> > > + 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
> > 0x00,
> > > 0x03,
> > > + 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00,
> > 0x00,
> > > 0x00,
> > > + 0x00, 0x00, 0x00, 0x3b, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00,
> > 0x00,
> > > 0x03,
> > > + 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00,
> > 0x00,
> > > 0x00,
> > > + 0xff, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> > 0x10,
> > > 0x00,
> > > + 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00,
> > 0x00,
> > > 0x82,
> > > + 0x73, 0x67, 0x6d, 0x69, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x02,
> > > + 0x00, 0x00, 0x00, 0x01, 0x65, 0x74, 0x68, 0x65, 0x72, 0x6e,
> > 0x65,
> > > 0x74,
> > > + 0x40, 0x66, 0x66, 0x30, 0x64, 0x30, 0x30, 0x30, 0x30, 0x00,
> > 0x00,
> > > 0x00,
> > > + 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00,
> > 0x00,
> > > 0x1b,
> > > + 0x63, 0x64, 0x6e, 0x73, 0x2c, 0x67, 0x65, 0x6d, 0x00, 0x00,
> > 0x00,
> > > 0x00,
> > > + 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00,
> > 0x00,
> > > 0x5f,
> > > + 0x6f, 0x6b, 0x61, 0x79, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x03,
> > > + 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00,
> > 0x00,
> > > 0x01,
> > > + 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00,
> > 0x00,
> > > 0x77,
> > > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3d, 0x00, 0x00,
> > 0x00,
> > > 0x04,
> > > + 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00,
> > 0x00,
> > > 0x3e,
> > > + 0x00, 0x00, 0x00, 0x00, 0xff, 0x0d, 0x00, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x00,
> > > + 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
> > 0x00,
> > > 0x06,
> > > + 0x00, 0x00, 0x00, 0x82, 0x73, 0x67, 0x6d, 0x69, 0x69, 0x00,
> > 0x00,
> > > 0x00,
> > > + 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x65, 0x74,
> > 0x68,
> > > 0x65,
> > > + 0x72, 0x6e, 0x65, 0x74, 0x40, 0x66, 0x66, 0x30, 0x65, 0x30,
> > 0x30,
> > > 0x30,
> > > + 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
> > 0x00,
> > > 0x09,
> > > + 0x00, 0x00, 0x00, 0x1b, 0x63, 0x64, 0x6e, 0x73, 0x2c, 0x67,
> > 0x65,
> > > 0x6d,
> > > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
> > 0x00,
> > > 0x05,
> > > + 0x00, 0x00, 0x00, 0x5f, 0x6f, 0x6b, 0x61, 0x79, 0x00, 0x00,
> > 0x00,
> > > 0x00,
> > > + 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00,
> > 0x00,
> > > 0x66,
> > > + 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
> > 0x00,
> > > 0x0c,
> > > + 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x3f,
> > > + 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
> > 0x00,
> > > 0x10,
> > > + 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0e,
> > 0x00,
> > > 0x00,
> > > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
> > 0x00,
> > > 0x03,
> > > + 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x82, 0x73, 0x67,
> > 0x6d,
> > > 0x69,
> > > + 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
> > 0x00,
> > > 0x02,
> > > + 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x09, 0x23, 0x61,
> > 0x64,
> > > 0x64,
> > > + 0x72, 0x65, 0x73, 0x73, 0x2d, 0x63, 0x65, 0x6c, 0x6c, 0x73,
> > 0x00,
> > > 0x23,
> > > + 0x73, 0x69, 0x7a, 0x65, 0x2d, 0x63, 0x65, 0x6c, 0x6c, 0x73,
> > 0x00,
> > > 0x63,
> > > + 0x6f, 0x6d, 0x70, 0x61, 0x74, 0x69, 0x62, 0x6c, 0x65, 0x00,
> > 0x72,
> > > 0x61,
> > > + 0x6e, 0x67, 0x65, 0x73, 0x00, 0x23, 0x69, 0x6e, 0x74, 0x65,
> > 0x72,
> > > 0x72,
> > > + 0x75, 0x70, 0x74, 0x2d, 0x63, 0x65, 0x6c, 0x6c, 0x73, 0x00,
> > 0x72,
> > > 0x65,
> > > + 0x67, 0x00, 0x69, 0x6e, 0x74, 0x65, 0x72, 0x72, 0x75, 0x70,
> > 0x74,
> > > 0x2d,
> > > + 0x63, 0x6f, 0x6e, 0x74, 0x72, 0x6f, 0x6c, 0x6c, 0x65, 0x72,
> > 0x00,
> > > 0x70,
> > > + 0x68, 0x61, 0x6e, 0x64, 0x6c, 0x65, 0x00, 0x73, 0x74, 0x61,
> > 0x74,
> > > 0x75,
> > > + 0x73, 0x00, 0x69, 0x6e, 0x74, 0x65, 0x72, 0x72, 0x75, 0x70,
> > 0x74,
> > > 0x2d,
> > > + 0x70, 0x61, 0x72, 0x65, 0x6e, 0x74, 0x00, 0x69, 0x6e, 0x74,
> > 0x65,
> > > 0x72,
> > > + 0x72, 0x75, 0x70, 0x74, 0x73, 0x00, 0x70, 0x68, 0x79, 0x2d,
> > 0x6d,
> > > 0x6f,
> > > + 0x64, 0x65, 0x00
> > > +};
> > > +unsigned int zynqmp_dtb_len = 1119;
> > > diff --git a/bsps/aarch64/xilinx-zynqmp/include/bsp.h
> > > b/bsps/aarch64/xilinx-zynqmp/include/bsp.h
> > > index d937a313f2..bb7df94fd1 100644
> > > --- a/bsps/aarch64/xilinx-zynqmp/include/bsp.h
> > > +++ b/bsps/aarch64/xilinx-zynqmp/include/bsp.h
> > > @@ -51,6 +51,7 @@
> > > #include <bsp/start.h>
> > >
> > > #include <rtems.h>
> > > +#include <rtems/termiostypes.h>
> > >
> > > #ifdef __cplusplus
> > > extern "C" {
> > > @@ -62,6 +63,10 @@ extern "C" {
> > > #define BSP_RESET_SMC
> > > #define BSP_CPU_ON_USES_SMC
> > >
> > > +#define BSP_FDT_IS_SUPPORTED
> > > +extern unsigned int zynqmp_dtb_len;
> > > +extern unsigned char zynqmp_dtb[];
> > > +
> > > /**
> > > * @brief Zynq UltraScale+ MPSoC specific set up of the MMU.
> > > *
> > > @@ -83,6 +88,16 @@ uint32_t zynqmp_clock_i2c0(void);
> > >
> > > uint32_t zynqmp_clock_i2c1(void);
> > >
> > > +/**
> > > + * @brief Zynq UltraScale+ MPSoC specific set up of a management
> > > console.
> > > + *
> > > + * Some systems may have a management interface which needs
> > special
> > > + * initialization. Provide in the application to override the
> > > defaults in the
> > > + * BSP. This will only be called if the interface is found in
> > the
> > > device tree.
> > > + */
> > > +__attribute__ ((weak))
> > > +void
> > > zynqmp_configure_management_console(rtems_termios_device_context
> > > *base);
> > > +
> > > #ifdef __cplusplus
> > > }
> > > #endif /* __cplusplus */
> > > diff --git a/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c
> > > b/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c
> > > index 33ca1eafab..e727f9b1de 100644
> > > --- a/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c
> > > +++ b/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c
> > > @@ -50,6 +50,10 @@ zynqmp_mmu_config_table[] = {
> > > .begin = 0xfd000000U,
> > > .end = 0xffc00000U,
> > > .flags = AARCH64_MMU_DEVICE
> > > + }, {
> > > + .begin = 0x80000000U,
> > > + .end = 0x80100000U,
> > > + .flags = 0
> > > }
> > > };
> > >
> > > diff --git a/spec/build/bsps/aarch64/xilinx-
> > zynqmp/bspcfc400xlp64.yml
> > > b/spec/build/bsps/aarch64/xilinx-zynqmp/bspcfc400xlp64.yml
> > > new file mode 100644
> > > index 0000000000..1687ced857
> > > --- /dev/null
> > > +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/bspcfc400xlp64.yml
> > > @@ -0,0 +1,21 @@
> > > +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> > > +arch: aarch64
> > > +bsp: xilinx_zynqmp_lp64_cfc400x
> > > +build-type: bsp
> > > +cflags: []
> > > +copyrights:
> > > +- Copyright (C) 2022 On-Line Applications Research (OAR)
> > > +cppflags: []
> > > +enabled-by: true
> > > +family: xilinx-zynqmp
> > > +includes: []
> > > +install: []
> > > +links:
> > > +- role: build-dependency
> > > + uid: grp_zu3eg
> > > +- role: build-dependency
> > > + uid: linkcmds_lp64
> > > +- role: build-dependency
> > > + uid: objfdtcfc400x
> > > +source: []
> > > +type: build
> > > diff --git a/spec/build/bsps/aarch64/xilinx-
> > zynqmp/bspqemuilp32.yml
> > > b/spec/build/bsps/aarch64/xilinx-zynqmp/bspqemuilp32.yml
> > > index 6e0eafc871..18968cd43d 100644
> > > --- a/spec/build/bsps/aarch64/xilinx-zynqmp/bspqemuilp32.yml
> > > +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/bspqemuilp32.yml
> > > @@ -17,5 +17,7 @@ links:
> > > uid: tstqemu
> > > - role: build-dependency
> > > uid: linkcmds_ilp32
> > > +- role: build-dependency
> > > + uid: objfdtzynqmp
> > > source: []
> > > type: build
> > > diff --git a/spec/build/bsps/aarch64/xilinx-
> > zynqmp/bspqemulp64.yml
> > > b/spec/build/bsps/aarch64/xilinx-zynqmp/bspqemulp64.yml
> > > index 0d047e263c..86177d7fcd 100644
> > > --- a/spec/build/bsps/aarch64/xilinx-zynqmp/bspqemulp64.yml
> > > +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/bspqemulp64.yml
> > > @@ -17,5 +17,7 @@ links:
> > > uid: tstqemu
> > > - role: build-dependency
> > > uid: linkcmds_lp64
> > > +- role: build-dependency
> > > + uid: objfdtzynqmp
> > > source: []
> > > type: build
> > > diff --git a/spec/build/bsps/aarch64/xilinx-
> > zynqmp/bspzu3egilp32.yml
> > > b/spec/build/bsps/aarch64/xilinx-zynqmp/bspzu3egilp32.yml
> > > index dd7d39fb94..cd0bb2b854 100644
> > > --- a/spec/build/bsps/aarch64/xilinx-zynqmp/bspzu3egilp32.yml
> > > +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/bspzu3egilp32.yml
> > > @@ -15,5 +15,7 @@ links:
> > > uid: grp_zu3eg
> > > - role: build-dependency
> > > uid: linkcmds_ilp32
> > > +- role: build-dependency
> > > + uid: objfdtzynqmp
> > > source: []
> > > type: build
> > > diff --git a/spec/build/bsps/aarch64/xilinx-
> > zynqmp/bspzu3eglp64.yml
> > > b/spec/build/bsps/aarch64/xilinx-zynqmp/bspzu3eglp64.yml
> > > index 073e91175b..19211dae15 100644
> > > --- a/spec/build/bsps/aarch64/xilinx-zynqmp/bspzu3eglp64.yml
> > > +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/bspzu3eglp64.yml
> > > @@ -15,5 +15,7 @@ links:
> > > uid: grp_zu3eg
> > > - role: build-dependency
> > > uid: linkcmds_lp64
> > > +- role: build-dependency
> > > + uid: objfdtzynqmp
> > > source: []
> > > type: build
> > > diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml
> > > b/spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml
> > > index 4147613fc9..1a3b754d92 100644
> > > --- a/spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml
> > > +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml
> > > @@ -21,6 +21,7 @@ source:
> > > - bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c
> > > - bsps/aarch64/shared/mmu/vmsav8-64.c
> > > - bsps/aarch64/xilinx-zynqmp/console/console.c
> > > +- bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c
> > > - bsps/aarch64/xilinx-zynqmp/start/bspstart.c
> > > - bsps/aarch64/xilinx-zynqmp/start/bspstarthooks.c
> > > - bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c
> > > diff --git a/spec/build/bsps/aarch64/xilinx-
> > zynqmp/objfdtcfc400x.yml
> > > b/spec/build/bsps/aarch64/xilinx-zynqmp/objfdtcfc400x.yml
> > > new file mode 100644
> > > index 0000000000..53d93803cb
> > > --- /dev/null
> > > +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/objfdtcfc400x.yml
> > > @@ -0,0 +1,14 @@
> > > +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> > > +build-type: objects
> > > +cflags: []
> > > +copyrights:
> > > +- Copyright (C) 2022 On-Line Applications Research (OAR)
> > > +cppflags: []
> > > +cxxflags: []
> > > +enabled-by: true
> > > +includes: []
> > > +install: []
> > > +links: []
> > > +source:
> > > +- bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c
> > > +type: build
> > > diff --git a/spec/build/bsps/aarch64/xilinx-
> > zynqmp/objfdtzynqmp.yml
> > > b/spec/build/bsps/aarch64/xilinx-zynqmp/objfdtzynqmp.yml
> > > new file mode 100644
> > > index 0000000000..271bb82976
> > > --- /dev/null
> > > +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/objfdtzynqmp.yml
> > > @@ -0,0 +1,14 @@
> > > +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> > > +build-type: objects
> > > +cflags: []
> > > +copyrights:
> > > +- Copyright (C) 2022 On-Line Applications Research (OAR)
> > > +cppflags: []
> > > +cxxflags: []
> > > +enabled-by: true
> > > +includes: []
> > > +install: []
> > > +links: []
> > > +source:
> > > +- bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c
> > > +type: build
> > > diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml
> > > b/spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml
> > > index 0bdc2d61df..976a4aeb0e 100644
> > > --- a/spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml
> > > +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml
> > > @@ -11,6 +11,7 @@ default: 32768
> > > default-by-variant:
> > > - value: 0x0
> > > variants:
> > > + - aarch64/xilinx_zynqmp_lp64_cfc400x
> > > - aarch64/xilinx_zynqmp_lp64_zu3eg
> > > - aarch64/xilinx_zynqmp_ilp32_zu3eg
> > > description: |
> > > diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml
> > > b/spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml
> > > index c17febe288..427f14c7c8 100644
> > > --- a/spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml
> > > +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml
> > > @@ -11,6 +11,7 @@ default: 0x40018000
> > > default-by-variant:
> > > - value: 0x10000000
> > > variants:
> > > + - aarch64/xilinx_zynqmp_lp64_cfc400x
> > > - aarch64/xilinx_zynqmp_lp64_zu3eg
> > > - aarch64/xilinx_zynqmp_ilp32_zu3eg
> > > description: |
> > > diff --git a/spec/build/cpukit/optsmp.yml
> > > b/spec/build/cpukit/optsmp.yml
> > > index b218364194..db404efe21 100644
> > > --- a/spec/build/cpukit/optsmp.yml
> > > +++ b/spec/build/cpukit/optsmp.yml
> > > @@ -13,6 +13,7 @@ description: |
> > > enabled-by:
> > > - aarch64/xilinx_zynqmp_ilp32_qemu
> > > - aarch64/xilinx_zynqmp_ilp32_zu3eg
> > > +- aarch64/xilinx_zynqmp_lp64_cfc400x
> > > - aarch64/xilinx_zynqmp_lp64_qemu
> > > - aarch64/xilinx_zynqmp_lp64_zu3eg
> > > - arm/altcycv_devkit
> > > --
> > > 2.30.2
> > >
> > > _______________________________________________
> > > devel mailing list
> > > devel at rtems.org
> > > http://lists.rtems.org/mailman/listinfo/devel
> > _______________________________________________
> > devel mailing list
> > devel at rtems.org
> > http://lists.rtems.org/mailman/listinfo/devel
> >
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