[PATCH] bsps: Improve riscv console FDT parsing

Padmarao.Begari at microchip.com Padmarao.Begari at microchip.com
Fri Sep 30 06:26:43 UTC 2022


Hi Alan,

I tested this patch and it is working fine on the PolarFire SoC Icicle
Kit.

Thanks & Regards
Padmarao

> On Thu, 2022-09-29 at 12:19 -0400, Alan Cudmore wrote:
> Hi Padmarao,
> Could you try this patch on your Polarfire board? It works on the
> generic QEMU BSP and the BSP I am working on which uses the
> FRDME310ARTY/SiFive UART. It builds with the Polarfire BSP, but I am
> not able to test it. I downloaded and built QEMU that has Polarfire
> support, but I need to download and install SoftConsole to get the
> rest of the parts I need to prepare the binary.
> Thanks!
> Alan
>  
> From: Alan Cudmore
> Sent: Thursday, September 29, 2022 12:12 PM
> To: devel at rtems.org
> Cc: Alan Cudmore
> Subject: [PATCH] bsps: Improve riscv console FDT parsing
>  
> This fixes a problem with parsing the FDT compatible property by
> replacing the RISCV_CONSOLE_IS_COMPATIBLE macro with calls to
> the fdt_stringlist_contains function. The macro only works when
> the compatible FDT entry is a single string and not a list of
> strings. The new call will compare each item in the string list.
>  
> Close #4728.
> ---
> bsps/riscv/riscv/console/console-config.c | 14 +++++---------
> 1 file changed, 5 insertions(+), 9 deletions(-)
>  
> diff --git a/bsps/riscv/riscv/console/console-config.c
> b/bsps/riscv/riscv/console/console-config.c
> index d962a5a418..7908c2f325 100644
> --- a/bsps/riscv/riscv/console/console-config.c
> +++ b/bsps/riscv/riscv/console/console-config.c
> @@ -139,10 +139,6 @@ static void riscv_console_set_reg_32(uintptr_t
> addr, uint8_t i, uint8_t val)
> }
> #endif
> -#define RISCV_CONSOLE_IS_COMPATIBLE(actual, actual_len, desired) \
> -  (actual_len == sizeof(desired) \
> -     && memcmp(actual, desired, sizeof(desired) - 1) == 0)
> -
> static void riscv_console_probe(void)
> {
>    const void *fdt;
> @@ -170,7 +166,7 @@ static void riscv_console_probe(void)
>      }
>  #if RISCV_ENABLE_HTIF_SUPPORT != 0
> -    if (RISCV_CONSOLE_IS_COMPATIBLE(compat, compat_len,
> "ucb,htif0")) {
> +    if (fdt_stringlist_contains(compat, compat_len, "ucb,htif0")) {
>        htif_console_context_init(&htif_console_instance.base, node);
>        riscv_console.context = &htif_console_instance.base;
> @@ -181,8 +177,8 @@ static void riscv_console_probe(void)
>  #if RISCV_CONSOLE_MAX_NS16550_DEVICES > 0
>      if (
> -      (RISCV_CONSOLE_IS_COMPATIBLE(compat, compat_len, "ns16550a")
> -          || RISCV_CONSOLE_IS_COMPATIBLE(compat, compat_len,
> "ns16750"))
> +        (fdt_stringlist_contains(compat, compat_len, "ns16550a")
> +        || fdt_stringlist_contains(compat, compat_len, "ns16750"))
>          && ns16550_devices < RISCV_CONSOLE_MAX_NS16550_DEVICES
>      ) {
>        ns16550_context *ctx;
> @@ -203,7 +199,7 @@ static void riscv_console_probe(void)
>          ctx->set_reg = riscv_console_set_reg_8;
>        }
> -      if (RISCV_CONSOLE_IS_COMPATIBLE(compat, compat_len,
> "ns16750")) {
> +      if (fdt_stringlist_contains(compat, compat_len, "ns16750")) {
>          ctx->has_precision_clock_synthesizer = true;
>        }
> @@ -243,7 +239,7 @@ static void riscv_console_probe(void)
> #endif
>  #if RISCV_ENABLE_FRDME310ARTY_SUPPORT != 0
> -    if (RISCV_CONSOLE_IS_COMPATIBLE(compat, compat_len,
> "sifive,uart0")) {
> +    if (fdt_stringlist_contains(compat, compat_len, "sifive,uart0"))
> {
>        fe310_uart_context *ctx;
>        ctx = &fe310_uart_instance;
> --
> 2.34.1
>  
>  


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