[PATCH 4/5] bsps/microblaze: Add device tree support to JFFS2 QSPI

Alex White alex.white at oarcorp.com
Fri Jan 13 04:33:36 UTC 2023


From: Ryan Long <ryan.long at oarcorp.com>

---
 bsps/microblaze/microblaze_fpga/fs/jffs2_qspi.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/bsps/microblaze/microblaze_fpga/fs/jffs2_qspi.c b/bsps/microblaze/microblaze_fpga/fs/jffs2_qspi.c
index 39328b6b7c..49859a03f1 100644
--- a/bsps/microblaze/microblaze_fpga/fs/jffs2_qspi.c
+++ b/bsps/microblaze/microblaze_fpga/fs/jffs2_qspi.c
@@ -46,6 +46,7 @@
 #include <rtems/jffs2.h>
 #include <rtems/libio.h>
 
+#include <bsp.h>
 #include <bsp/jffs2_qspi.h>
 
 #define BLOCK_SIZE (64UL * 1024UL)
@@ -286,12 +287,24 @@ int microblaze_jffs2_initialize( const char* mount_dir )
   int rv = 0;
   int fd = -1;
 
+  uintptr_t mblaze_spi_base = try_get_prop_from_device_tree(
+    "xlnx,xps-spi-2.00.a",
+    "reg",
+    BSP_MICROBLAZE_FPGA_SPI_BASE
+  );
+
+  rtems_vector_number mblaze_spi_irq_num = try_get_prop_from_device_tree(
+    "xlnx,xps-spi-2.00.a",
+    "interrupts",
+    BSP_MICROBLAZE_FPGA_SPI_IRQ_NUM
+  );
+
   rv = spi_bus_register_xilinx_axi(
     BUS_PATH,
-    BSP_MICROBLAZE_FPGA_SPI_BASE,
+    mblaze_spi_base,
     FLASH_PAGE_SIZE,
     FLASH_NUM_CS,
-    BSP_MICROBLAZE_FPGA_SPI_IRQ_NUM
+    mblaze_spi_irq_num
   );
   if ( rv != 0 ) {
     return rv;
-- 
2.34.1



More information about the devel mailing list