bsps/xilinx-zynqmp : Add BSP for RPU

[Philip Kirkpatrick]

Thanks for all the good feedback.

RE Joel:
I'll fix my sloppy formatting that you caught and submit a revised patch.
If I'm realistic about my schedule, I probably won't be able to get to it
until next week.
For xttcps_hw.h, there already is one #ifndef __rtems__ around the
#includes, but on review there is another spot where I got lazy and used a
#if 0.  I'll correct that too.  Other than that, the file is unmodified.

On the discussion about a shared space, I'll leave that decision up to
you.  Tell me what you want and I can adjust as needed, or it could be done
in a follow-on patch.

For the Versal, I've never used that part and am not very familiar with it,
but the feedback from Aaron makes it sound like the core is probably pretty
similar.  One other possible difference would be in the timers but it does
look like the Versal has the same TTCs.  There just may be a small bit of
work to set up the clock input to it.

-Phil

On Thu, Jun 15, 2023 at 8:59 AM Aaron Nyholm <
aaron.nyholm at unfoldedeffective.com> wrote:

> This looks exciting.
>
> As for Versal support from Xilinx's Docs "RPU
>
> The real-time processing unit (RPU) Arm Cortex-R5F processor has faster
> clocking frequencies than the Zynq UltraScale+ MPSoC. The Versal Arm
> Cortex-R5F processor supports Vector Floating-Point v3 (VFPv3) whereas the
> Zynq UltraScale+ MPSoC Arm Cortex-R5F processor supports VFPv2."
> https://docs.xilinx.com/r/en-US/ug1273-versal-acap-design/RPU
>
> VFPv3 is backwards compatible with VFPv2 (
> https://developer.arm.com/documentation/ddi0344/d/programmer-s-model/vfpv3-architecture?lang=en
> ).
>
> So hopefully reuse for the Versal should relativity straight forward.
>
> Side note, even though Xilinx says the R5F in the ZynqMP has VFPv2, ARM
> says to compile with vfpv3_d16 like what is already in the BSP (
> https://developer.arm.com/documentation/dui0472/i/CIHGDBHC).
>
> Thanks, Aaron
>
>
> ------- Original Message -------
> On Thursday, June 15th, 2023 at 9:17 AM, Chris Johns <chrisj at rtems.org>
> wrote:
>
>
> >
> >
> > On 14/6/2023 6:08 pm, Philip Kirkpatrick wrote:
> >
> > > This patch adds support for running RTEMS on the RPU (cortex R5) cores
> of the
> > > ZynqMP.
> >
> >
> > Thanks for submitting this BSP. It is exciting to see this work and
> support
> > being added.
> >
> > How different are the ZynqMP RPU cores and the ones on the Versal?
> >
> > I have not looked in detail but I know they are both R5 devices and I
> think we
> > should be able to reuse this support. Is placing the RPU pieces under
> the ZynqMP
> > sources what we want or should we consider how we would reuse the RPU
> BSP on
> > other Xilinx devices?
> >
> > I am leading with this question without reviewing the sources in detail
> so I
> > apologise for this. I am happy to look at Versal support so I am not
> asking that
> > to be done.
> >
> > Chris
> > _______________________________________________
> > devel mailing list
> > devel at rtems.org
> > http://lists.rtems.org/mailman/listinfo/devel
>
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