[PATCH v2 0/3] bsps/riscv: Add kendrytek210 riscv BSP variant

Alan Cudmore alan.cudmore at gmail.com
Tue Mar 21 21:15:02 UTC 2023


Thanks for the test! I'm working on setting up the Polarfire HSS software
so I can try running on the icicle kit emulation on renode.io.

FYI: If anyone is interested in a very inexpensive RISC-V board, the
Pine64.org Ox64 boards are back in stock:
https://pine64.com/product-category/ox64/
These might make an interesting RTEMS target, since the SoC has 64Mbytes of
PSRAM and can run Linux.

Alan


On Fri, Mar 17, 2023 at 7:41 AM <Padmarao.Begari at microchip.com> wrote:

>
> I have tested it on the renode.io simulator and working fine.
>
> Regards
> Padmarao
> > On Wed, 2023-03-15 at 22:04 -0400, Alan Cudmore wrote:
> >
> > Version 2 patch updates: Separated the device tree source and encoded
> > device tree blob into a separate patch, added the license text to
> > k210.h, eliminated whitespace warnings, and eliminated dead code in
> > the conditional compilation structure for the core_get_frequency
> > function in start/bspstart.c.
> >
> > This patch set adds the riscv/kendrytek210 BSP variant to support the
> > Kendryte K210 Dual Core RISC-V SoC. The BSP runs on the renode.io
> > simulator, the Sipeed MAiX BiT and MAiXDuino boards, and would likely
> > run on other boards. RTEMS binaries can be flashed to the boards
> > using
> > the kflash python utility available through the pip command.
> > Currently
> > the BSP supports the console UART which is shared with the
> > frdme310arty,
> > an interrupt controller, and timer. The included device tree source
> > just covers a minimal set of peripherals. The device tree can be
> > expanded as additional device support is addded.
> > Manufacturer, board links, and other information can be found in
> > ticket #4876.
> >
> > Documentation that describes how to build and run the BSP on the
> > boards and simulator has been prepared and will be submitted after
> > the bsp
> > is merged.
> >
> > The full testsuite has not been run on this BSP, but I run a
> > subset of the of testsuite on the renode.io robot test framework.
> >
> > Alan Cudmore (3):
> >   bsps/riscv: add device tree source and device tree blob header for
> >     k210 bsp variant
> >   bsps/riscv: add riscv/kendrytek210 BSP variant source changes
> >   spec: add riscv kendrytek210 variant build options
> >
> >  bsps/riscv/riscv/config/kendrytek210.cfg      |   9 +
> >  bsps/riscv/riscv/console/console-config.c     |  10 +-
> >  bsps/riscv/riscv/console/fe310-uart.c         |   2 +-
> >  bsps/riscv/riscv/dts/kendryte-k210.dts        | 216 ++++++++++++
> >  bsps/riscv/riscv/include/bsp.h                |   4 +
> >  bsps/riscv/riscv/include/bsp/k210.h           | 105 ++++++
> >  .../riscv/include/bsp/kendryte-k210-dtb.h     | 315
> > ++++++++++++++++++
> >  bsps/riscv/riscv/include/bsp/riscv.h          |   4 +
> >  bsps/riscv/riscv/start/bspstart.c             |  43 +++
> >  spec/build/bsps/optdtb.yml                    |   4 +-
> >  spec/build/bsps/optdtbheaderpath.yml          |   2 +
> >  spec/build/bsps/optfdtuboot.yml               |   3 +
> >  spec/build/bsps/riscv/optramsize.yml          |   2 +
> >  spec/build/bsps/riscv/riscv/abi.yml           |   1 +
> >  .../bsps/riscv/riscv/bspkendrtyek210.yml      |  19 ++
> >  spec/build/bsps/riscv/riscv/grp.yml           |   4 +
> >  spec/build/bsps/riscv/riscv/obj.yml           |   1 +
> >  .../bsps/riscv/riscv/optkendrytek210.yml      |  18 +
> >  spec/build/bsps/riscv/riscv/optns16550max.yml |   4 +-
> >  spec/build/bsps/riscv/riscv/optsifiveuart.yml |  20 ++
> >  spec/build/cpukit/optsmp.yml                  |   1 +
> >  21 files changed, 779 insertions(+), 8 deletions(-)
> >  create mode 100644 bsps/riscv/riscv/config/kendrytek210.cfg
> >  create mode 100644 bsps/riscv/riscv/dts/kendryte-k210.dts
> >  create mode 100644 bsps/riscv/riscv/include/bsp/k210.h
> >  create mode 100644 bsps/riscv/riscv/include/bsp/kendryte-k210-dtb.h
> >  create mode 100644 spec/build/bsps/riscv/riscv/bspkendrtyek210.yml
> >  create mode 100644 spec/build/bsps/riscv/riscv/optkendrytek210.yml
> >  create mode 100644 spec/build/bsps/riscv/riscv/optsifiveuart.yml
> >
> > --
> > 2.25.1
> >
> > _______________________________________________
> > devel mailing list
> > devel at rtems.org
> > http://lists.rtems.org/mailman/listinfo/devel
>
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