[PATCH] bsps/arm: Improve GICv3 support

Sebastian Huber sebastian.huber at embedded-brains.de
Wed Apr 17 05:51:47 UTC 2024

On 16.04.24 16:51, Kinsey Moore wrote:
> This adds warnings for arm_interrupt_enable_interrupts and 
> arm_interrupt_restore_interrupts. I suspect a missing header. They also 
> generate a link error on the a53_lp64_qemu bsp. I also dislike the 
> while(true), but I don't think we officially have anything against it 
> and there are existing examples in the codebase.

Did you test this with the latest master? Actually, I committed a 
similar patch for the GICv2 and then noticed that this broke the GICv3 
support. This is fixed by the current patch.

What would be your alternative to this while (true) loop?

void bsp_interrupt_dispatch(void)
   while (true) {
     uint32_t icciar = READ_SR(ICC_IAR1);
     rtems_vector_number vector = GIC_CPUIF_ICCIAR_ACKINTID_GET(icciar);
     uint32_t status;

     if (!bsp_interrupt_is_valid_vector(vector)) {

     status = arm_interrupt_enable_interrupts();

     WRITE_SR(ICC_EOIR1, icciar);

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