Question regarding ARMV7M FPU context switch and ISRs

[Cedric Berger]

Hello,

I've a question: does RTEMS really wants to support FPU operations in ISRs?

Because if the answer is "no", then I believe that we could simplify the 
RTEMS code (and for me the mental model of the whole thing) by running 
the FPU with both FPCCR.ASPEN and FPCCR.LSPEN = 0.

This mean that during IRQ/exception, the simple exception frame (32 
bytes) would always be used instead of a combination of the simple and 
extended frame (32 or 116 bytes).

This would then improve the real-time guarantees of the system, by 
having a shorter and more deterministic IRQ response time.

This would also simplify the context switching code, by centralizing of 
the saving of the FPU context in RTEMS only, and enabling optimisation 
like only saving/restoring the FPU when switching between tasks defined 
with RTEMS_FLOATING_POINT.

What do you think? I'm missing something? would it be a good idea?

I would be willing to work on that is there is some kind of agreement here.

Cedric

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