mips hangs during startup

[mike varga]

Help!

I am using RTEMS and have written/ported my own
BSP for a Huricane board with a RM5231 QED.

 I am trying to replace the 
PMON's interrupt execetion vector
with my own. I assume it includes a
memcpy to 0x80000180 with the 
new vector; SR(BEV) bit is set 
accordingly; then an Icache invalidate.

The memory write works fine
but the Invalidate hangs execution
within the debugger.

I have listed here the exact
instruction that is causing the Hurricane, my board to hang
while steping through startup.

cache 0x10, 0(0xffffffff80000180)

This instruction is supposed to Invalidate the instruction cache if
the address 0xffffffff80000180 is in cache.

Does anyone have any suggestions? Ideas? Could the PMON be causing
this problem?

Thanks
Mike Varga
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