mips hangs during startup

[gregory.menke at gsfc.nasa.gov]

I'm not sure this is your problem, but PMON has to keep the exception
vector in order to singlestep, when you overwrite it, your code is
going to get the exceptions.  If you really must singlestep after you
take the exception vector, you might modify cpu_asm.S to call back to
PMON's handler when the single-step exception comes in.  If you have
the PMON source handy, it  keeps a vector table of interesting
routines which you could call into without much trouble.

I can't duplicate your problem because our PMON won't singlestep
properly (we'll fix it at some point...).


Gregm



mike varga writes:
 > Help!
 > 
 > I am using RTEMS and have written/ported my own
 > BSP for a Huricane board with a RM5231 QED.
 > 
 >  I am trying to replace the 
 > PMON's interrupt execetion vector
 > with my own. I assume it includes a
 > memcpy to 0x80000180 with the 
 > new vector; SR(BEV) bit is set 
 > accordingly; then an Icache invalidate.
 > 
 > The memory write works fine
 > but the Invalidate hangs execution
 > within the debugger.
 > 
 > I have listed here the exact
 > instruction that is causing the Hurricane, my board to hang
 > while steping through startup.
 > 
 > cache 0x10, 0(0xffffffff80000180)
 > 
 > This instruction is supposed to Invalidate the instruction cache if
 > the address 0xffffffff80000180 is in cache.
 > 
 > Does anyone have any suggestions? Ideas? Could the PMON be causing
 > this problem?
 > 
 > Thanks
 > Mike Varga