ARM inline assembly patch

[Jay Monkman]

I'm trying to get RTEMS working on an ARM940T board, and ran
into a problem where a function was overwriting a passed in 
parameter before using or saving it. It turns out some inline
assembly code (CPU_ISR_Disable and CPU_ISR_Enable) modifies a 
register without telling the compiler.

Here's a patch against snapshot-20020301 that fixes it. I've also 
consolidated the 3 asm statements into one.

--- rtems-ss-20020301/c/src/exec/score/cpu/arm/rtems/score/cpu.h        Wed Nov 28 12:15:58 2001
+++ cvs-rtems/c/src/exec/score/cpu/arm/rtems/score/cpu.h   Wed Apr 17 18:41:22 2002
@@ -540,9 +540,10 @@
 #define _CPU_ISR_Disable( _level ) \
   { \
     (_level) = 0; \
-    asm volatile ("MRS r0, cpsr \n" ); \
-    asm volatile ("ORR  r0, r0, #0xc0 \n" ); \
-    asm volatile ("MSR  cpsr, r0 \n" ); \
+    asm volatile ("MRS r0, cpsr \n"  \
+                  "ORR  r0, r0, #0xc0 \n" \
+                  "MSR  cpsr, r0 \n" \
+                   : : : "r0"); \
   }
 
 /*
@@ -553,9 +554,10 @@
 
 #define _CPU_ISR_Enable( _level )  \
   { \
-    asm volatile ("MRS r0, cpsr \n" ); \
-    asm volatile ("AND  r0, r0, #0xFFFFFF3F \n" ); \
-    asm volatile ("MSR  cpsr, r0 \n" ); \
+    asm volatile ("MRS r0, cpsr \n"  \
+                  "AND  r0, r0, #0xFFFFFF3F \n" \
+                  "MSR  cpsr, r0 \n" \
+                  : : : "r0" ); \
   }
   
 /*

   
-- 
Jay Monkman	    The truth knocks on the door and you say "Go away, I'm 
monkman at jump.net    looking for the truth," and so it goes away. Puzzling.
		     - from _Zen_and_the_Art_of_Motorcycle_Maintenance_