context switch question

Joel Sherrill joel.sherrill at OARcorp.com
Thu Apr 25 11:34:52 UTC 2002



Jay Monkman wrote:
> 
> I'm trying to do a BSP for an ARM940T, and have a problem running the
> ticker sample. Each of the three tasks starts fine, but none of
> them return from rtems_task_wake_after(). After the third task
> calls that, there's about a 5 second delay before _CPU_Context_switch()
> gets called (I think that's what is supposed to happen). If I'm
> looking at it right, it looks like it's switching from the
> idle task to the to task 1 (again, like I think it's supposed to), and
> then nothing - it stays in the idle loop.
> 
> It looks like the watchdog that gets set up in rtems_task_wake_after()
> is not working right, but I'm not exactly sure, since I haven't figured
> out what is supposed to be going on, yet.
> 
> Can anybody point me in the right direction? Thanks.

ticker is a good test because there are a number of cases quickly
hit.  1st clock tick interrupt, 2nd clock tick interrupt, and
preempting clock tick interrupt.  The 5 second one is the preempting
clock tick interrupt and a special path out of the ISR.  I suspect
that you are seeing interrupts left disabled in this case.  The
normal flow of execution is something like this:

  IDLE task is running
  _ISR_Handler takes vector
    tick ISR handler
      rtems_clock_tick wakes up TA1
  return to RTEMS ISR code
  decides it needs to preempt out of ISR
  builds a "funny" stack frame that returns to the IDLE
    task but cases it to call _Thread_Dispatch so it will
    switch out.  (***HERE***)
  returns to a label often called _Thread_ISR_Dispatch in
     context of IDLE
  calls _Thread_Dispatch
  switches to TA1
  
The point I marked ***HERE*** is the point at which it is
easy to mess things up and accidentally end up with interrupts
off when you call _Thread_Dispatch.  You usually want to end
up at the label _Thread_ISR_Dispatch at the same interrupt
disable level as the interrupted task (e.g. IDLE in this case).

Greg Menke is unfortunately familiar with this path on the
MIPS as he recently broke it as he optimized the ISR exit code. :) 

> --
> Jay Monkman         The truth knocks on the door and you say "Go away, I'm
> monkman at jump.net    looking for the truth," and so it goes away. Puzzling.
>                      - from _Zen_and_the_Art_of_Motorcycle_Maintenance_

-- 
Joel Sherrill, Ph.D.             Director of Research & Development
joel at OARcorp.com                 On-Line Applications Research
Ask me about RTEMS: a free RTOS  Huntsville AL 35805
   Support Available             (256) 722-9985



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