Problems with GCC for ARM

[Thomas Rauscher]

On Wed, 18 Dec 2002, Jay Monkman wrote:

> I tried these with the two compilers I have:
> 	gcc-2.95.3, dated 20010315
> 	gcc-3.2.1, dated 20021203
>
> > http://gcc.gnu.org/ml/gcc-bugs/2000-06/msg00705.html
>
> Didn't happen with either.
>
> > http://gcc.gnu.org/ml/gcc-bugs/2002-08/msg00100.html
>
> Happened with 2.95.3, but not 3.2.1. However if I use -O3, it doesn't
> happen - most of the code is optimized away.
>
> > http://gcc.gnu.org/ml/gcc-help/2002-11/msg00168.html
>
> This looks like a repeat of the previous one, but no test code to
> test.
>
> > http://www.geocrawler.com/archives/3/356/2000/9/50/4412642
>
> Again, no test code, but I'm guessing it's the same as the first test
> above.
>
> We've been using 2.95.3 for our development, but we use -O3.
> I just looked through most of our builds for a 'tst' instruction
> followed by an instruction that sets the condition registers, and
> couldn't find any.
>
> We've got a bunch of systems in use and I don't think we've run into
> any erratic behavior that isn't our fault. With a different
> application, that statement might not hold, though.
>

I cannot confirm gcc (3.2) bugs producing wrong ARM code (as
far as I can tell now). The compiled code seems to be stable for all
optimization levels (1,2,3,s) in our programs.

There are bugs around in THUMB code generation, where illegal
instructions are emitted which are rejected by the assembler later.

I underline Jay Monkman's comment:
There may be compiler bugs, but they are not triggered by our code ...

Best regards,
Thomas

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Dipl.-Ing. Thomas Rauscher                 Tel.:   ++43 1 402 08 05 15
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