ISR

[VALETTE Eric]

Angelo Fraietta wrote:
> in the rtems_irq_connect_data structure, is the function (in the 
> following case isr_port_dev2) called in the context of the ISR?
> 
> static rtems_irq_connect_data port_dev2_isr_data =
> {
>  BSP_IRQ_DEV_PORT1_IRQ,
>  isr_port_dev2,
>  isr_on,
>  isr_off,
>  isr_is_on};
> 
> BSP_install_rtems_irq_handler( &port_dev2_isr_data );
> 

The answer is yes. The status is as follow :
	1) Interrupt enabled at processor level,
	2) Minimal scratch registers pushed on the interrupt stack (switch to 
interrupt stack managed by software on PCC, and ix86),
	3) At PIC level (8259 emulation or SIU + CPM, or Openpic), the current 
interrupt (+other interrupts depending on (software managed interrupt 
priorities) is masked but acknowledged meaning that only what remains to 
be done on external hardware to reenable the interrupt needs to be 
performed,
	4) Upon return of interrupt the PIC status concerning enabled interrupt 
at entry is restored,

Hope it clarifies the model.

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