Installing interrupt handlers on ARM7TDMI

[Charles Steaderman]

I tried posting this to rtems-snapshots. Is it working?

I am trying to bring up a BSP for a custom ARM7TDMI based board. I have 
the base BSP up and running, except for interrupts (meaning that I can 
compile, build, and download code to my target and execute tests which 
create tasks, etc.). I started with the armulator port and mixed in 
necessart things from the vegaplus and arm_bare_bsps as I though I 
needed. The problem that I have is that I have a monitor (umon) which 
runs before my rtems application which is loaded from flash into ram 
before execution. The umon had been written to begin execution at 
address 0 (processor reset), remap flash to 0x01000000 and ram to 
0x00000000, and continue execution. This works quite well, and I don't 
need implement any interrupt handlers in the umon flash code, I can 
leave it all up to the application/os to manage interrupts. The ARM7TDMI 
interrupt handling is a bit different than some processors in that it 
has 1 (or 2) hardware interrupt handlers which then call the various 
interrupt handling functions for timers, uart, rtc, etc. This 
redirection seems to be addressed in the sample BSPs and ARM shared 
code, but not clearly or completely as far as I can tell (my ignorance I 
am sure). Anyway, there seem to be 2 interrupt redirection tables, one 
referenced in BSP_install_rtems_irq_handler and one in 
_CPU_ISR_install_vector. The _CPU_ISR_install_vector handler appears to 
place a list of function pointers in memory, immediately following the 
hardware interrupt table (based upon MAX_INTERRUPT_???) which in my case 
is starting at address 0x20. These appear to be mirrored handlers of the 
hardware interrupt handlers. Then, BSP_install_rtems_irq_handler creates 
a table of handlers for the specific device interrupts such as timer, 
uart, etc, which is placed at address 0x40 based upon the bsp that I 
started from. Unfortunately, I don't seem to have an example of an 
interrupt handler which should be placed at address 0x18 and 0x1c for 
the IRQHandler and FIQHandlers respectively. In addition, I am not sure 
how to "install" handlers at those address as the CPU expects jump 
instructions to be placed in the handlers NOT the address of a function 
to be called. Any guidance would be greatly appreciated.

- Charlie

-- 
Charlie Steaderman
charlies at poliac.com
VP Engineering
Poliac Research Corporation
Phone: 952.707.6245
Cel: 612.242.6364