Installing interrupt handlers on ARM7TDMI

[gregory.menke at gsfc.nasa.gov]

 > the IRQHandler and FIQHandlers respectively. In addition, I am not sure 
 > how to "install" handlers at those address as the CPU expects jump 
 > instructions to be placed in the handlers NOT the address of a function 
 > to be called. Any guidance would be greatly appreciated.
 > 

This sounds roughly MIPS-like, there are a couple well known addresses
that the cpu jumps to on given events; one of which is a cpu
exception.  Generally, as the bsp initializes, it inserts a jump to
the RTEMS exception/interrupt handling code.  The code itself is
supplied on a per-cpu basis and is found under c/src/exec/score/cpu,
(for us its in mips/cpu_asm.S)

The routine figures out what interrupt(s) occured & vectors
accordingly.  On the MIPS, we get interrupts and cpu exceptions
through this one routine & vector them both through the same table.
We #define "interrupt" vectors and "exception" vectors, which makes it
easier to keep track of whats going on.

The interrupt/exception code for each cpu can be simpler or more
complex according to how it was left and to what degree it supports
RTEMS's various features.  When we first started working with the
R3000 support in RTEMS, it was pretty basic.  We spent a good bit of
time making the vectoring nice & properly supporting integer-only vs
floating point enabled tasks & proper (or at least reasonable) support
of interrupt levels.  We also added a gdb debugging stub.  Code in
this portion of RTEMS can be difficult to work with and debug because
of the sometimes brain-twisting nature of how multitasking works.

There is probably already a good bit of it already set up, its
possible all you'd need to do is get your bsp to properly insert the
jump and/or insert vectors to service the right interrupts.

Gregm