Installing interrupt handlers on ARM7TDMI

Jay Monkman jtm at
Tue Jul 16 20:51:38 UTC 2002

On Tue, Jul 16, 2002 at 11:32:26AM -0500, Charles Steaderman wrote:
> leave it all up to the application/os to manage interrupts. The ARM7TDMI 
> interrupt handling is a bit different than some processors in that it 
> has 1 (or 2) hardware interrupt handlers which then call the various 
> interrupt handling functions for timers, uart, rtc, etc. This 
> redirection seems to be addressed in the sample BSPs and ARM shared 
> code, but not clearly or completely as far as I can tell (my ignorance I 

The interrupt handling that is in the current snapshots is broken. It
doesn't save all the registers it needs to. I have new code that I
think works (for interrupt handling - it has other problems). I'm
working on a patch right now, and will send it out this afternoon.

> started from. Unfortunately, I don't seem to have an example of an 
> interrupt handler which should be placed at address 0x18 and 0x1c for 
> the IRQHandler and FIQHandlers respectively. In addition, I am not sure 

The default handler (_ISR_Handler) is in
libbsp/arm/shared/irq/irq_asm.S, and is installed in

Here's how the ARM vectors get installed:
   _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ISR_Handler, NULL);

_ISR_Handler is the function that will call the BSP specific handler
for every IRQ assertion.

Here's an example of installing the handler for one of the muxed IRQ
static void clock_isr_on(const rtems_irq_connect_data *unused);
static void clock_isr_off(const rtems_irq_connect_data *unused);
static int clock_isr_is_on(const rtems_irq_connect_data *irq);

rtems_irq_connect_data clock_isr_data = {INT_TM1,
                                   0 };

static void clock_isr_on(const rtems_irq_connect_data *unused)

static void clock_isr_off(const rtems_irq_connect_data *unused)

static int clock_isr_is_on(const rtems_irq_connect_data *irq)
    return 1;

Most of the fields in rtems_irq_connect_data are ignored. I believe
the only important ones are the the first two (INT_TM1 and Clock_isr)
in this example.

> how to "install" handlers at those address as the CPU expects jump 
> instructions to be placed in the handlers NOT the address of a function 
> to be called. Any guidance would be greatly appreciated.

I think the vegaplus BSP is a better example for interrupts than the

Jay Monkman	    The truth knocks on the door and you say "Go away, I'm 
                    looking for the truth," and so it goes away. Puzzling.
		     - from _Zen_and_the_Art_of_Motorcycle_Maintenance_

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