more multiple dec21140 on ppc <fixed>
Joel Sherrill
joel.sherrill at OARcorp.com
Fri Feb 28 17:40:36 UTC 2003
gregory.menke at gsfc.nasa.gov wrote:
>
> gregory.menke at gsfc.nasa.gov writes:
> >
> > > gregory.menke at gsfc.nasa.gov writes:
> > > >
> > > > Till Straumann writes:
> > > > > gregory.menke at gsfc.nasa.gov wrote:
> > > > > > (sorry Till, I sent a copy to to alone by accident...)
> > > > > >
> > > > > >
> > > > > > I'm still working on it and have little more to report except that its
> > > > > > increasingly looking like something isn't quite configured right in
> > > > > > MPIC or the PBC.
> > > > > >
> > > > > > Shifting the onboard dec to MPIC irq 2 (which its supposed to be wired
> > > > > > to) causes it to stop receiving interrupts (and I am changing its
> > > > > > INTERRUPT_LINE value to 2, with name = 18). I've only been able to
> > > > > > make the onboard dec operate under its ISA irq 10.
> > > > > >
> > > > >
> > > > > Hmm - I cannot reproduce your problem on my mvme2306 board.
> > > > > Here's what works (with both, the original dec21140.c and the
> > > > > modified version you sent me a couple of days ago) on my board:
> > > >
> >
> > Till, now I understand what you mean by not wanting a struct sockaddr
> > for interrupts, I just learned about the pci swizzle... I agree with
> > you.
> >
> > If I have the onboard ethernet on ISA 10, and the cpci board vectored
> > for service on all 4 cpci interrupt lines, with the onboard ethernet
> > pinging continuously, I will sometimes see MPIC irq 11 asserts. It
> > seems like something is stopping the MPIC from receiving/servicing the
> > interrupts, possibly unless MPIC irq 0 is coincidentally being
> > signalled. I wonder if it might be a subtle inservice/ack problem...
> >
>
> The problem was the polarities and senses arguments to openpic_init
> were reversed. This apparently doesn't interfere with MPIC irq 0, but
> on the ppc it appears to mess up the other irq's. Perhaps the
> different openpic on Till's vme board handles the situation enough
> differently so the bug is masked. I've confirmed this by successfully
> running the onboard ethernet on mpic irq 2.
>
> Whew. Theres still some problem with packet I/O on the cpci board,
> but at least the mpic and cpci interrupts look right.
>
> Joel, I'll include a patch to irq_init.c for this fix along with the
> dec driver once the irq issue is settled down reasonably. No doubt
> when the irq api changes there will be upheaval- but we'll cross that
> bridge when we get there.
Congrats on finding it. I am leaning to this being on the
development trunk and not the release branch. OK?
> Gregm
--
Joel Sherrill, Ph.D. Director of Research & Development
joel at OARcorp.com On-Line Applications Research
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