Quesions on toolchains for MIPS32 4KC

[Ren, Han Tao (Hans)]

Hello,  

I've set up the rtems tools for "jmr3904" but the CPU I'm supposed to use is
MIPS32 4kc.

I can successfully build the example code "hello_world_c" now, however when
I run the code in 
the simulator of MIPS32 4kc, it reported error when the Floating-point
instruction is reached.
I know MIPS32 4kc doesn't have CP1, so I rebuilt the example again by adding
-msoft-float as 
the complier option, but the result was the same. Finally I found the
Floating-point  instruction is 
acturally used in the assembly file "start.S". And I don't know how to
modify it.

>From previous discusssions, it seems I need modified something in RTEMS to
support MIPS 4kc.  
Actually, when I built rtems, I just strictly followed the instructions of
document "Getting Started 
with RTEMS for C/C++ Users"
(http://www.rtems.org/onlinedocs/releases/rtemsdocs-4.6.0pre5/share/rtems/ht
ml/).  
I'm a newbie. So, could you please share me some detailed instructions of
how to build the rtems 
toolchains for MIPS32 4kc?

Thanks a lot!

Hans



-----Original Message-----
From: mikeci at acm.org [mailto:mikeci at acm.org]
Sent: Thursday, September 11, 2003 3:56 AM
To: gregory.menke at gsfc.nasa.gov
Cc: rtems-users at rtems.com
Subject: Re: BSP for MIPS32 4KC


Hi!

See the inline answers:

>
> OK, it seems we have some problems communicating.  I know you have a
> working BSP, but we can't just commit changes without understanding the
> implications.  I think we really must identify what MIPS32 means, so
> please answer the following questions;
>
> - What revision is your processor, R3000 or R4000?
My processor is MIPS 4Kc which is based on MIPS32 architecture.

> - What is the Register width?  (this is 32, from above)

32 bit registers.

> - Why will __mips == 3 not work?

Problem is that you can mix modules compiled with mips=1 and mips2 with
modules compiled with mips=3 and mips=4. Anyway, this makes life difficult
because than you need to pass cpu= to gcc. By using mips=32 you can
support all MIPS32 cpus. All the gcc libraries are compiled with mips=1,
and you can't mix them. Then, again I don't know how can you distinguish
between libraries compiled with mips=3 and mips=1. Is there a support in
the gcc for this?

> - Do you need CP1 support or not?  Your patch simply deletes the
>   mathco support, which isn't appropriate for commiting into RTEMS
> because other MIPS bsp's use it.  To resolve this, I think we'll need
> to do bsp #includes in the cpukit code, or test for
>   -msoft-float, which shouldn't be all that horrible, but we have to
> know what we're doing.

My processor doesn't have CP1, and I had problems with the code dealing
with floating point. I don't know why this code was included in my code
even when defining -msoft-float and setting appropriate constants in cpu.h
(MIPS_HAS_FPU).  This is the reason why I deleted that part. For all
other, this must be left in.


> Thanks,
>
> Gregm