joel.sherrill at OARcorp.com
Wed Sep 10 16:42:44 UTC 2003
gregory.menke at gsfc.nasa.gov wrote:
> Bill Gatliff writes:
> > Greg:
> > I'm not a MIPS guru (yet!), but I'm thinking that some of the MIPS
> > macros come from include files. Could this be a case of a missing
> > ..include directive, or a missing macro definition that used to be there?
> I've not seen them in any includes yet, I think much of the macrology
> is coming from inside gas, as there are environmental issues that
> affect some instructions. I'd love to know where the stuff is set up
> though, as there might well be some really handy instruction
This should be inside the assembler because gcc is directly generating
lw and st instructions. The PowerPC also has instructions like this
and I vaguely recall the PA-RISC assembler doing the same thing.
The problem boils down to the instruction set not allowing the encoding
of 32-bit constants. So you have to come up with tricks to get part
of the address loaded and then merge it with another part. This is the
job of the assembler on many RISC architectures.
NOTE: When all instructions are 32-bits, there are not enough bits
to have an opcode and the full 32-bit value. I recall various
RISC architectures limits around 14 bit constants.
Joel Sherrill, Ph.D. Director of Research & Development
joel at OARcorp.com On-Line Applications Research
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