ppc405 dma - vm - cache question

[Feng, Shuchen]

Gene Smith wrote :

>"snoop of hardware or software" is a new term to me. Could you explain 
>what you mean by this? Yes, I can see cache would be a concern like when

>tcp/ip writes to mbufs in data cache and the device does not see the 
>real data when it tries to send the "same" mbufs using dma. I think this

>requires the sync and/or eieio instructions but not sure. I am still 
>trying to learn this stuff. Thanks.

The hadrware snoop should be some mechanism provided by your ethernet
controller if available.  For example, it is programmable by registers
if desired for my 10/100 MHZ ethernet of the mvme5500 BSP.


Did anyone implement software snoop to ensure cache coherence in RTEMS ?
I thought the software snoop would impose overhead that one might as well 
map the  accessed memory to be non-cachable (e.g. implemented in the
RTEMS motorola_shared bsp's).  Maybe someone can verify this for me.


It seems to me that PPC405 does not use the RTEMS motorola_shared bsp,
and your firmware maps the accessed memory  to be cachable.


Cheers,
Kate