ppc405 dma - vm - cache question

Feng, Shuchen feng at bnl.gov
Wed Oct 27 17:18:28 UTC 2004


>The hadrware snoop should be some mechanism provided by your ethernet
>controller if available.  For example, it is programmable by registers
>if desired for my 10/100 MHZ ethernet of the mvme5500 BSP.


>Did anyone implement software snoop to ensure cache coherence in RTEMS ?
>I thought the software snoop would impose overhead that one might as
>well 
>map the  accessed memory to be non-cachable (e.g. implemented in the
>RTEMS motorola_shared bsp's).  Maybe someone can verify this for me.

I do not know how well ethernet driver perform with non-cacheable memory.

>It seems to me that PPC405 does not use the RTEMS motorola_shared bsp,
>and your firmware maps the accessed memory  to be cachable.

I really do not have the datasheet for the RTEMS motorola_shared BSP.
It could be that the firmware of thoses supported board already
had the hardware snoop turned on.  It would be better if you can
find out how to turn the hardware snoop on for your board. 


Kate



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