Clock not running (was Re: RTEMS4.7 and its tool chain (Re: powerpc mvme5500 clock off by factor of 150))

[Sergei Organov]

Till Straumann <strauman at slac.stanford.edu> writes:

> Peter Dufault wrote:
> > On Mar 8, 2005, at 9:46 PM, Till Straumann wrote:
> >> Hmm - I smell something: could you try to insert a '&' after the '=' ?
> >>
> >> asm volatile ("mfdec %0; add %0, %0, %1; mtdec %0":"=&r"(decr):"r"(Clock_Decrementer_value));
> >
> > It's working.  Thanks, you're Hero of the Day. Can you translate into
> > English, or into C?
> 
> I must shamefully decline - I feel more like the loser of the day since I'm
> actually responsible for that bug, sorry.
> 
>  From the gcc manual:

[...]

Well, instead of wrestling with fancy GCC inline assembler features
almost nobody understands anyway, why not to write it simply as:

    int dec;
    asm volatile ("mfdec %0": "=r" (dec));
    asm volatile ("mtdec %0": : "r" (dec + Clock_Decrementer_value));

that gives exactly the same result as the above at any reasonable level
of optimization?

Better yet, should PowerPC port define:

#define MFDEC(dec_) asm volatile ("mfdec %0": "=r" (dec_))
#define MTDEC(dec_) asm volatile ("mtdec %0": : "r" (dec_))

then the ugly

asm volatile ("mfdec %0; add %0, %0, %1; mtdec %0":"=&r"(decr):"r"(Clock_Decrementer_value));

becomes even more readable:

   int dec;
   MFDEC(dec);
   MTDEC(dec + Clock_Decrementer_value);

In fact PowerPC port has a lot of asms like the above that could be
simplified. Just take a look at:

#define _CPU_ISR_Disable( _isr_cookie ) \
  { register unsigned int _disable_mask = MSR_EE; \
    _isr_cookie = 0; \
    asm volatile ( \
	"mfmsr %0; andc %1,%0,%1; mtmsr %1" : \
	"=&r" ((_isr_cookie)), "=&r" ((_disable_mask)) : \
	"0" ((_isr_cookie)), "1" ((_disable_mask)) \
	); \
  }

-- 
Sergei.